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clk_tree: Update clock tree programming guide for esp32c6

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Song Ruo Jing
2023-01-17 11:30:43 +08:00
parent c7c2462d39
commit 4bd36e6576
3 changed files with 15 additions and 12 deletions
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components/soc/esp32c6/include/soc/clk_tree_defs.h
+3 -3
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@@ -37,8 +37,8 @@ extern "C" {
*
* 6) External Slow Clock (optional): OSC_SLOW
*
* A clock signal generated by an external circuit with frequency ~32kHz can be connected to GPIO0
* to be the clock source for the RTC_SLOW_CLK.
* A slow clock signal generated by an external circuit can be connected to GPIO0 to be the clock source for the
* RTC_SLOW_CLK.
*
* OSC_SLOW_CLK can also be calibrated to get its exact frequency.
*/
@@ -95,7 +95,7 @@ typedef enum {
*/
typedef enum {
SOC_RTC_FAST_CLK_SRC_RC_FAST = 0, /*!< Select RC_FAST_CLK as RTC_FAST_CLK source */
SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK (may referred as XTAL_CLK_DIV_2) as RTC_FAST_CLK source */
SOC_RTC_FAST_CLK_SRC_XTAL_D2 = 1, /*!< Select XTAL_D2_CLK as RTC_FAST_CLK source */
SOC_RTC_FAST_CLK_SRC_XTAL_DIV = SOC_RTC_FAST_CLK_SRC_XTAL_D2, /*!< Alias name for `SOC_RTC_FAST_CLK_SRC_XTAL_D2` */
SOC_RTC_FAST_CLK_SRC_INVALID, /*!< Invalid RTC_FAST_CLK source */
} soc_rtc_fast_clk_src_t;