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refactor(esp_clk_tree): rename esp_clk_tree_enable_src API

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Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Chen Chen
2026-09-20 16:49:24 +08:00
co-authored by Cursor
parent 04cbfc2242
commit 4b85046a4a
79 changed files with 317 additions and 265 deletions
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components/esp_driver_i2s/i2s_common.c
+3 -3
View File
@@ -1521,7 +1521,7 @@ esp_err_t i2s_del_channel(i2s_chan_handle_t handle)
#endif
// since the enum value of default clock on some chips may be 0, we use mode to check if the clock is enabled
if (handle->mode != I2S_COMM_MODE_NONE) {
esp_clk_tree_enable_src((soc_module_clk_t)clk_src, false);
esp_clk_tree_release_src((soc_module_clk_t)clk_src);
}
#if CONFIG_PM_ENABLE
@@ -1901,9 +1901,9 @@ esp_err_t i2s_channel_tune_rate(i2s_chan_handle_t handle, const i2s_tuning_confi
xSemaphoreTake(handle->mutex, portMAX_DELAY);
#if SOC_I2S_SUPPORTS_APLL
if (handle->clk_src == I2S_CLK_SRC_APLL) {
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src(SOC_MOD_CLK_APLL, false), err, TAG, "APLL disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src(SOC_MOD_CLK_APLL), err, TAG, "APLL disable failed");
handle->sclk_hz = i2s_set_get_apll_freq(new_mclk);
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src(SOC_MOD_CLK_APLL, true), err, TAG, "APLL enable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_acquire_src(SOC_MOD_CLK_APLL), err, TAG, "APLL enable failed");
}
#endif
/* Calculate the new divider */
components/esp_driver_i2s/i2s_pdm.c
+8 -8
View File
@@ -88,7 +88,7 @@ static esp_err_t i2s_pdm_tx_set_clock(i2s_chan_handle_t handle, const i2s_pdm_tx
i2s_hal_clock_info_t clk_info;
// Calculate clock parameters before enabling clock source
ESP_RETURN_ON_ERROR(i2s_pdm_tx_calculate_clock(handle, clk_cfg, &clk_info), TAG, "clock calculate failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_acquire_src((soc_module_clk_t)clk_src), TAG, "clock source enable failed");
hal_utils_clk_div_t ret_mclk_div = {};
portENTER_CRITICAL(&g_i2s.spinlock);
@@ -120,7 +120,7 @@ static esp_err_t i2s_pdm_tx_set_clock(i2s_chan_handle_t handle, const i2s_pdm_tx
return ret;
err:
esp_clk_tree_enable_src((soc_module_clk_t)clk_src, false);
esp_clk_tree_release_src((soc_module_clk_t)clk_src);
return ret;
}
@@ -301,7 +301,7 @@ esp_err_t i2s_channel_reconfig_pdm_tx_clock(i2s_chan_handle_t handle, const i2s_
ESP_GOTO_ON_ERROR(i2s_pdm_tx_set_clock(handle, clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
#ifdef CONFIG_PM_ENABLE
// Create/Re-create power management lock
if (old_clk_src != clk_cfg->clk_src) {
@@ -359,7 +359,7 @@ esp_err_t i2s_channel_reconfig_pdm_tx_slot(i2s_chan_handle_t handle, const i2s_p
#endif
ESP_GOTO_ON_ERROR(i2s_pdm_tx_set_clock(handle, &pdm_tx_cfg->clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
}
xSemaphoreGive(handle->mutex);
@@ -461,7 +461,7 @@ static esp_err_t i2s_pdm_rx_set_clock(i2s_chan_handle_t handle, const i2s_pdm_rx
* can be set while ref_cnt is still < 2 (which is the threshold for freq change) */
ESP_RETURN_ON_ERROR(i2s_pdm_rx_calculate_clock(handle, clk_cfg, &clk_info), TAG, "clock calculate failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_acquire_src((soc_module_clk_t)clk_src), TAG, "clock source enable failed");
hal_utils_clk_div_t ret_mclk_div = {};
portENTER_CRITICAL(&g_i2s.spinlock);
@@ -488,7 +488,7 @@ static esp_err_t i2s_pdm_rx_set_clock(i2s_chan_handle_t handle, const i2s_pdm_rx
return ret;
err:
esp_clk_tree_enable_src((soc_module_clk_t)clk_src, false);
esp_clk_tree_release_src((soc_module_clk_t)clk_src);
return ret;
}
@@ -670,7 +670,7 @@ esp_err_t i2s_channel_reconfig_pdm_rx_clock(i2s_chan_handle_t handle, const i2s_
ESP_GOTO_ON_ERROR(i2s_pdm_rx_set_clock(handle, clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
#ifdef CONFIG_PM_ENABLE
// Create/Re-create power management lock
if (old_clk_src != clk_cfg->clk_src) {
@@ -728,7 +728,7 @@ esp_err_t i2s_channel_reconfig_pdm_rx_slot(i2s_chan_handle_t handle, const i2s_p
#endif
ESP_GOTO_ON_ERROR(i2s_pdm_rx_set_clock(handle, &pdm_rx_cfg->clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
}
xSemaphoreGive(handle->mutex);
components/esp_driver_i2s/i2s_std.c
+4 -4
View File
@@ -98,7 +98,7 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
i2s_hal_clock_info_t clk_info;
// Calculate clock parameters before enabling clock source
ESP_RETURN_ON_ERROR(i2s_std_calculate_clock(handle, clk_cfg, &clk_info), TAG, "clock calculate failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_acquire_src((soc_module_clk_t)clk_src), TAG, "clock source enable failed");
hal_utils_clk_div_t ret_mclk_div = {};
portENTER_CRITICAL(&g_i2s.spinlock);
@@ -128,7 +128,7 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
return ret;
err:
esp_clk_tree_enable_src((soc_module_clk_t)clk_src, false);
esp_clk_tree_release_src((soc_module_clk_t)clk_src);
return ret;
}
@@ -415,7 +415,7 @@ esp_err_t i2s_channel_reconfig_std_clock(i2s_chan_handle_t handle, const i2s_std
ESP_GOTO_ON_ERROR(i2s_std_set_clock(handle, clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
#ifdef CONFIG_PM_ENABLE
// Create/Re-create power management lock
@@ -473,7 +473,7 @@ esp_err_t i2s_channel_reconfig_std_slot(i2s_chan_handle_t handle, const i2s_std_
#endif
ESP_GOTO_ON_ERROR(i2s_std_set_clock(handle, &std_cfg->clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
}
xSemaphoreGive(handle->mutex);
components/esp_driver_i2s/i2s_tdm.c
+4 -4
View File
@@ -96,7 +96,7 @@ static esp_err_t i2s_tdm_set_clock(i2s_chan_handle_t handle, const i2s_tdm_clk_c
i2s_hal_clock_info_t clk_info;
// Calculate clock parameters before enabling clock source
ESP_RETURN_ON_ERROR(i2s_tdm_calculate_clock(handle, clk_cfg, &clk_info), TAG, "clock calculate failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
ESP_RETURN_ON_ERROR(esp_clk_tree_acquire_src((soc_module_clk_t)clk_src), TAG, "clock source enable failed");
hal_utils_clk_div_t ret_mclk_div = {};
portENTER_CRITICAL(&g_i2s.spinlock);
@@ -126,7 +126,7 @@ static esp_err_t i2s_tdm_set_clock(i2s_chan_handle_t handle, const i2s_tdm_clk_c
return ret;
err:
esp_clk_tree_enable_src((soc_module_clk_t)clk_src, false);
esp_clk_tree_release_src((soc_module_clk_t)clk_src);
return ret;
}
@@ -394,7 +394,7 @@ esp_err_t i2s_channel_reconfig_tdm_clock(i2s_chan_handle_t handle, const i2s_tdm
ESP_GOTO_ON_ERROR(i2s_tdm_set_clock(handle, clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
#ifdef CONFIG_PM_ENABLE
// Create/Re-create power management lock
@@ -453,7 +453,7 @@ esp_err_t i2s_channel_reconfig_tdm_slot(i2s_chan_handle_t handle, const i2s_tdm_
#endif
ESP_GOTO_ON_ERROR(i2s_tdm_set_clock(handle, &tdm_cfg->clk_cfg), err, TAG, "update clock failed");
// disable old clock source after new clock is successfully configured
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)old_clk_src, false), err, TAG, "clock source disable failed");
ESP_GOTO_ON_ERROR(esp_clk_tree_release_src((soc_module_clk_t)old_clk_src), err, TAG, "clock source disable failed");
}
/* Reset queue (skip when no GDMA path is in use) */