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refactor(lp_periph): move enable and reset control to LL driver

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This commit is contained in:
morris
2023-08-28 05:17:56 +00:00
parent ab42d63054
commit 4a45479336
13 changed files with 160 additions and 265 deletions
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components/esp_hw_support/CMakeLists.txt
-4
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@@ -36,10 +36,6 @@ if(NOT BOOTLOADER_BUILD)
"port/${target}/esp_clk_tree.c"
"port/esp_clk_tree_common.c")
if(CONFIG_SOC_LP_PERIPHERALS_SUPPORTED)
list(APPEND srcs "lp_periph_ctrl.c")
endif()
if(CONFIG_SOC_ADC_SUPPORTED)
list(APPEND srcs "adc_share_hw_ctrl.c")
endif()
components/esp_hw_support/include/esp_private/lp_periph_ctrl.h
-59
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@@ -1,59 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/periph_defs.h"
#include "soc/clk_tree_defs.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_LP_PERIPHERALS_SUPPORTED
/**
* @brief Enable LP peripheral module by un-gating the clock and de-asserting the reset signal.
*
* @param[in] lp_periph LP peripheral module
*
* @note If @c lp_periph_module_enable() is called a number of times,
* @c lp_periph_module_disable() has to be called the same number of times,
* in order to put the peripheral into disabled state.
*/
void lp_periph_module_enable(lp_periph_module_t lp_periph);
/**
* @brief Disable LP peripheral module by gating the clock and asserting the reset signal.
*
* @param[in] lp_periph LP peripheral module
*
* @note If @c lp_periph_module_enable() is called a number of times,
* @c lp_periph_module_disable() has to be called the same number of times,
* in order to put the peripheral into disabled state.
*/
void lp_periph_module_disable(lp_periph_module_t lp_periph);
/**
* @brief Reset LP peripheral module by asserting and de-asserting the reset signal.
*
* @param[in] lp_periph LP peripheral module
*
* @note Calling this function does not enable or disable the clock for the module.
*/
void lp_periph_module_reset(lp_periph_module_t lp_periph);
/**
* @brief Set LP peripheral module clock source.
*
* @param[in] lp_periph LP peripheral module
* @param[in] clk_src Module clock source, check soc/clk_tree_defs.h for the available clock sources for each LP peripheral
*/
void lp_periph_set_clk_src(lp_periph_module_t lp_periph, soc_module_clk_t clk_src);
#endif
#ifdef __cplusplus
}
#endif
components/esp_hw_support/lp_periph_ctrl.c
-49
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@@ -1,49 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "freertos/FreeRTOS.h"
#include "esp_private/lp_periph_ctrl.h"
#include "hal/lp_periph_clk_ctrl_ll.h"
static portMUX_TYPE lp_periph_spinlock = portMUX_INITIALIZER_UNLOCKED;
static uint8_t ref_counts[LP_PERIPH_MODULE_MAX] = {0};
void lp_periph_module_enable(lp_periph_module_t lp_periph)
{
portENTER_CRITICAL(&lp_periph_spinlock);
if (ref_counts[lp_periph] == 0) {
// Enable clock and clear reset
lp_periph_ll_enable_clk_clear_rst(lp_periph);
}
ref_counts[lp_periph]++;
portEXIT_CRITICAL(&lp_periph_spinlock);
}
void lp_periph_module_disable(lp_periph_module_t lp_periph)
{
portENTER_CRITICAL(&lp_periph_spinlock);
ref_counts[lp_periph]--;
if (ref_counts[lp_periph] == 0) {
// Disable clock and set reset
lp_periph_ll_disable_clk_set_rst(lp_periph);
}
portEXIT_CRITICAL(&lp_periph_spinlock);
}
void lp_periph_module_reset(lp_periph_module_t lp_periph)
{
portENTER_CRITICAL(&lp_periph_spinlock);
lp_periph_ll_reset(lp_periph);
portEXIT_CRITICAL(&lp_periph_spinlock);
}
void lp_periph_set_clk_src(lp_periph_module_t lp_periph, soc_module_clk_t clk_src)
{
portENTER_CRITICAL(&lp_periph_spinlock);
lp_periph_ll_set_clk_src(lp_periph, clk_src);
portEXIT_CRITICAL(&lp_periph_spinlock);
}