test(ana_cmpr): migrate analog comparator test sources to C++

Convert test files in the analog comparator test app from C to C++ and update initializations/types for strict C++ compilation while keeping test behavior unchanged.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
morris
2026-05-18 11:20:06 +08:00
co-authored by Cursor
parent fce70533fa
commit 49bb908f3e
5 changed files with 159 additions and 143 deletions
@@ -1,14 +1,14 @@
set(srcs "test_app_main.c"
"test_ana_cmpr_utils.c"
"test_ana_cmpr.c")
"test_ana_cmpr_utils.cpp"
"test_ana_cmpr.cpp")
if(CONFIG_ANA_CMPR_ISR_CACHE_SAFE)
list(APPEND srcs "test_ana_cmpr_iram.c")
list(APPEND srcs "test_ana_cmpr_iram.cpp")
endif()
if(CONFIG_SOC_ANA_CMPR_SUPPORT_ETM AND CONFIG_SOC_TIMER_SUPPORT_ETM)
# Analog Comparator event test relies on GPTIMER task
list(APPEND srcs "test_ana_cmpr_etm.c")
list(APPEND srcs "test_ana_cmpr_etm.cpp")
endif()
idf_component_register(SRCS ${srcs}
@@ -6,18 +6,25 @@
#include "test_ana_cmpr.h"
static inline gpio_num_t test_pad_gpio_num(int pad_gpio)
{
return static_cast<gpio_num_t>(pad_gpio);
}
TEST_CASE("ana_cmpr unit install/uninstall", "[ana_cmpr]")
{
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = 100, // Set a wrong unit
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
ana_cmpr_config_t config = {};
config.unit = 100; // Set a wrong unit
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
.src_chan0_gpio = ana_cmpr_periph[0].pad_gpios[0],
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[0].pad_gpios[0]);
#else
config.src_chan0_gpio = GPIO_NUM_NC;
#endif
};
config.ext_ref_gpio = GPIO_NUM_NC;
/* Allocate a wrong unit */
TEST_ESP_ERR(ESP_ERR_INVALID_ARG, ana_cmpr_new_unit(&config, &cmpr));
/* Reject negative interrupt priority */
@@ -30,9 +37,8 @@ TEST_CASE("ana_cmpr unit install/uninstall", "[ana_cmpr]")
/* Try to allocate a existed unit */
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, ana_cmpr_new_unit(&config, &cmpr));
/* Set the internal reference before enable */
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
/* Enable the unit */
TEST_ESP_OK(ana_cmpr_enable(cmpr));
@@ -49,7 +55,7 @@ TEST_CASE("ana_cmpr unit install/uninstall", "[ana_cmpr]")
/* Try to set internal reference for a external unit */
config.ref_src = ANA_CMPR_REF_SRC_EXTERNAL;
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
config.ext_ref_gpio = ana_cmpr_periph[0].pad_gpios[1];
config.ext_ref_gpio = test_pad_gpio_num(ana_cmpr_periph[0].pad_gpios[1]);
#endif
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
TEST_ESP_ERR(ESP_ERR_NOT_ALLOWED, ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
@@ -61,22 +67,24 @@ TEST_CASE("ana_cmpr event callback", "[ana_cmpr]")
{
uint32_t cnt = 0;
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
.resample_limit = 3,
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.resample_limit = 3;
#else
config.src_chan0_gpio = GPIO_NUM_NC;
config.resample_limit = 0;
#endif
};
config.ext_ref_gpio = GPIO_NUM_NC;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
gpio_num_t src_chan_io = test_init_src_chan_gpio(cmpr, 0, 0);
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_debounce_config_t dbc_cfg = {
.wait_us = 10,
@@ -115,21 +123,20 @@ TEST_CASE("ana_cmpr event callback", "[ana_cmpr]")
TEST_CASE("ana_cmpr source channel management api", "[ana_cmpr]")
{
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
.resample_limit = 3,
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
};
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.ext_ref_gpio = GPIO_NUM_NC;
config.resample_limit = 3;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
ana_cmpr_src_chan_config_t src_cfg = {
.gpio_num = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[1],
.cross_type = ANA_CMPR_CROSS_POS,
};
ana_cmpr_src_chan_config_t src_cfg = {};
src_cfg.gpio_num = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[1]);
src_cfg.cross_type = ANA_CMPR_CROSS_POS;
TEST_ESP_OK(ana_cmpr_add_src_chan(cmpr, 1, &src_cfg));
TEST_ESP_OK(ana_cmpr_remove_src_chan(cmpr, 1));
TEST_ESP_OK(ana_cmpr_remove_src_chan(cmpr, 1));
@@ -159,28 +166,27 @@ TEST_CASE("ana_cmpr trigger scan and get output level", "[ana_cmpr]")
TEST_IGNORE_MESSAGE("not supported on old IP version");
#else
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
.resample_limit = 3,
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
};
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.ext_ref_gpio = GPIO_NUM_NC;
config.resample_limit = 3;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
ana_cmpr_src_chan_config_t src_cfg = {
.cross_type = ANA_CMPR_CROSS_ANY,
};
ana_cmpr_src_chan_config_t src_cfg = {};
src_cfg.gpio_num = GPIO_NUM_NC;
src_cfg.cross_type = ANA_CMPR_CROSS_ANY;
// for test purpose, source channel N uses pad N.
for (int i = 1; i < ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM); i++) {
src_cfg.gpio_num = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i];
src_cfg.gpio_num = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]);
TEST_ESP_OK(ana_cmpr_add_src_chan(cmpr, i, &src_cfg));
}
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_scan_config_t scan_cfg = {
@@ -193,9 +199,9 @@ TEST_CASE("ana_cmpr trigger scan and get output level", "[ana_cmpr]")
for (int i = 0; i < ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM); i++) {
bool out_level = false;
gpio_output_enable(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]);
gpio_output_enable(test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]));
// Set input to low (0V), which is lower than 50% VDD reference
gpio_set_level(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i], 0);
gpio_set_level(test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]), 0);
// Trigger a scan to update the comparison result
TEST_ESP_OK(ana_cmpr_trigger_scan(cmpr));
vTaskDelay(pdMS_TO_TICKS(10));
@@ -203,7 +209,7 @@ TEST_CASE("ana_cmpr trigger scan and get output level", "[ana_cmpr]")
TEST_ASSERT_EQUAL(false, out_level);
// Set input to high (3.3V), which is higher than 50% VDD reference
gpio_set_level(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i], 1);
gpio_set_level(test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]), 1);
// Trigger a scan to update the comparison result
TEST_ESP_OK(ana_cmpr_trigger_scan(cmpr));
vTaskDelay(pdMS_TO_TICKS(10));
@@ -222,27 +228,26 @@ TEST_CASE("ana_cmpr trigger scan step mode", "[ana_cmpr]")
TEST_IGNORE_MESSAGE("not supported on old IP version");
#else
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
.resample_limit = 3,
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
};
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.ext_ref_gpio = GPIO_NUM_NC;
config.resample_limit = 3;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
ana_cmpr_src_chan_config_t src_cfg = {
.cross_type = ANA_CMPR_CROSS_ANY,
};
ana_cmpr_src_chan_config_t src_cfg = {};
src_cfg.gpio_num = GPIO_NUM_NC;
src_cfg.cross_type = ANA_CMPR_CROSS_ANY;
for (int i = 1; i < ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM); i++) {
src_cfg.gpio_num = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i];
src_cfg.gpio_num = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[i]);
TEST_ESP_OK(ana_cmpr_add_src_chan(cmpr, i, &src_cfg));
}
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_scan_config_t scan_cfg = {
@@ -251,7 +256,7 @@ TEST_CASE("ana_cmpr trigger scan step mode", "[ana_cmpr]")
};
TEST_ESP_OK(ana_cmpr_set_scan_config(cmpr, &scan_cfg));
gpio_num_t src_chan_ios[ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM)] = {0};
gpio_num_t src_chan_ios[ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM)] = {};
for (int i = 0; i < ANALOG_CMPR_LL_GET(SRC_CHANNEL_NUM); i++) {
src_chan_ios[i] = test_init_src_chan_gpio(cmpr, i, 0);
}
@@ -300,24 +305,23 @@ TEST_CASE("ana_cmpr capture timestamps", "[ana_cmpr]")
TEST_IGNORE_MESSAGE("not supported on old IP version");
#else
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
.resample_limit = 3,
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
.en_capture_timer = true,
};
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.ext_ref_gpio = GPIO_NUM_NC;
config.resample_limit = 3;
config.en_capture_timer = true;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
uint32_t resolution_hz = 0;
TEST_ESP_OK(ana_cmpr_get_clock_resolution_hz(cmpr, &resolution_hz));
TEST_ASSERT_GREATER_THAN_UINT32(0, resolution_hz);
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_scan_config_t scan_cfg = {
@@ -16,14 +16,18 @@
#define TEST_TIME_US 5000
static inline gpio_num_t test_pad_gpio_num(int pad_gpio)
{
return static_cast<gpio_num_t>(pad_gpio);
}
static gptimer_handle_t test_ana_cmpr_gptimer_init(void)
{
gptimer_handle_t gptimer = NULL;
gptimer_config_t timer_config = {
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
.resolution_hz = 1 * 1000 * 1000, // 1MHz, 1 tick = 1us
};
gptimer_config_t timer_config = {};
timer_config.clk_src = GPTIMER_CLK_SRC_DEFAULT;
timer_config.direction = GPTIMER_COUNT_UP;
timer_config.resolution_hz = 1 * 1000 * 1000; // 1MHz, 1 tick = 1us
TEST_ESP_OK(gptimer_new_timer(&timer_config, &gptimer));
TEST_ESP_OK(gptimer_set_raw_count(gptimer, 0));
TEST_ESP_OK(gptimer_enable(gptimer));
@@ -40,21 +44,23 @@ static ana_cmpr_handle_t test_ana_cmpr_init(void)
{
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
.resample_limit = 3,
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.resample_limit = 3;
#else
config.src_chan0_gpio = GPIO_NUM_NC;
config.resample_limit = 0;
#endif
};
config.ext_ref_gpio = GPIO_NUM_NC;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_debounce_config_t dbc_cfg = {
@@ -114,9 +120,8 @@ static test_ana_cmpr_etm_handles_t test_ana_cmpr_init_etm_chain_v1(ana_cmpr_hand
test_ana_cmpr_etm_handles_t etm_handles = {};
/* Allocate the analog comparator positive & negative cross events */
ana_cmpr_etm_event_config_t evt_cfg = {
.event_type = ANA_CMPR_EVENT_POS_CROSS,
};
ana_cmpr_etm_event_config_t evt_cfg = {};
evt_cfg.event_type = ANA_CMPR_EVENT_POS_CROSS;
TEST_ESP_OK(ana_cmpr_new_etm_event(cmpr, &evt_cfg, &etm_handles.cmpr_pos_evt));
evt_cfg.event_type = ANA_CMPR_EVENT_NEG_CROSS;
TEST_ESP_OK(ana_cmpr_new_etm_event(cmpr, &evt_cfg, &etm_handles.cmpr_neg_evt));
@@ -212,10 +217,8 @@ TEST_CASE("ana_cmpr etm event delete keeps sibling source event working", "[ana_
// Trigger a scan to make sure the initial level is sampled
TEST_ESP_OK(ana_cmpr_trigger_scan(cmpr));
ana_cmpr_etm_event_config_t evt_cfg = {
.src_chan_id = 0,
.event_type = ANA_CMPR_EVENT_POS_CROSS,
};
ana_cmpr_etm_event_config_t evt_cfg = {};
evt_cfg.event_type = ANA_CMPR_EVENT_POS_CROSS;
esp_etm_event_handle_t pos_evt = NULL;
esp_etm_event_handle_t neg_evt = NULL;
TEST_ESP_OK(ana_cmpr_new_etm_event(cmpr, &evt_cfg, &pos_evt));
@@ -260,6 +263,8 @@ TEST_CASE("ana_cmpr etm event delete keeps sibling source event working", "[ana_
#define TEST_ETM_SCAN_PERIOD_US 50
#define TEST_ETM_WAIT_TIMEOUT_US 2000
static constexpr gpio_num_t TEST_ETM_MONITOR_GPIO_NUM = static_cast<gpio_num_t>(TEST_ETM_MONITOR_GPIO);
typedef struct {
esp_etm_event_handle_t gptimer_alarm_evt;
esp_etm_event_handle_t cmpr_pos_evt;
@@ -328,9 +333,8 @@ static test_ana_cmpr_etm_task_handles_t test_ana_cmpr_init_etm_chain_v2(ana_cmpr
};
TEST_ESP_OK(ana_cmpr_new_etm_task(cmpr, &cmpr_task_cfg, &etm_handles.cmpr_start_task));
ana_cmpr_etm_event_config_t cmpr_evt_cfg = {
.event_type = ANA_CMPR_EVENT_POS_CROSS,
};
ana_cmpr_etm_event_config_t cmpr_evt_cfg = {};
cmpr_evt_cfg.event_type = ANA_CMPR_EVENT_POS_CROSS;
TEST_ESP_OK(ana_cmpr_new_etm_event(cmpr, &cmpr_evt_cfg, &etm_handles.cmpr_pos_evt));
cmpr_evt_cfg.event_type = ANA_CMPR_EVENT_NEG_CROSS;
TEST_ESP_OK(ana_cmpr_new_etm_event(cmpr, &cmpr_evt_cfg, &etm_handles.cmpr_neg_evt));
@@ -339,8 +343,8 @@ static test_ana_cmpr_etm_task_handles_t test_ana_cmpr_init_etm_chain_v2(ana_cmpr
gpio_task_cfg.actions[0] = GPIO_ETM_TASK_ACTION_SET;
gpio_task_cfg.actions[1] = GPIO_ETM_TASK_ACTION_CLR;
TEST_ESP_OK(gpio_new_etm_task(&gpio_task_cfg, &etm_handles.gpio_set_task, &etm_handles.gpio_clr_task));
TEST_ESP_OK(gpio_etm_task_add_gpio(etm_handles.gpio_set_task, TEST_ETM_MONITOR_GPIO));
TEST_ESP_OK(gpio_etm_task_add_gpio(etm_handles.gpio_clr_task, TEST_ETM_MONITOR_GPIO));
TEST_ESP_OK(gpio_etm_task_add_gpio(etm_handles.gpio_set_task, TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(gpio_etm_task_add_gpio(etm_handles.gpio_clr_task, TEST_ETM_MONITOR_GPIO_NUM));
esp_etm_channel_config_t etm_cfg = {};
TEST_ESP_OK(esp_etm_new_channel(&etm_cfg, &etm_handles.etm_reload_handle));
@@ -368,8 +372,8 @@ static void test_ana_cmpr_deinit_etm_chain_v2(test_ana_cmpr_etm_task_handles_t h
TEST_ESP_OK(esp_etm_channel_disable(handles.etm_pos_handle));
TEST_ESP_OK(esp_etm_channel_disable(handles.etm_neg_handle));
TEST_ESP_OK(gpio_etm_task_rm_gpio(handles.gpio_set_task, TEST_ETM_MONITOR_GPIO));
TEST_ESP_OK(gpio_etm_task_rm_gpio(handles.gpio_clr_task, TEST_ETM_MONITOR_GPIO));
TEST_ESP_OK(gpio_etm_task_rm_gpio(handles.gpio_set_task, TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(gpio_etm_task_rm_gpio(handles.gpio_clr_task, TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(esp_etm_del_task(handles.gpio_set_task));
TEST_ESP_OK(esp_etm_del_task(handles.gpio_clr_task));
@@ -392,13 +396,14 @@ TEST_CASE("ana_cmpr etm task periodic scan", "[ana_cmpr][etm]")
ana_cmpr_handle_t cmpr = test_ana_cmpr_init();
gpio_num_t src_gpio = test_init_src_chan_gpio(cmpr, 0, 0);
gpio_config_t monitor_gpio_cfg = {
.intr_type = GPIO_INTR_DISABLE,
.mode = GPIO_MODE_INPUT_OUTPUT,
.pin_bit_mask = 1ULL << TEST_ETM_MONITOR_GPIO,
};
gpio_config_t monitor_gpio_cfg = {};
monitor_gpio_cfg.pin_bit_mask = 1ULL << TEST_ETM_MONITOR_GPIO;
monitor_gpio_cfg.mode = GPIO_MODE_INPUT_OUTPUT;
monitor_gpio_cfg.pull_up_en = GPIO_PULLUP_DISABLE;
monitor_gpio_cfg.pull_down_en = GPIO_PULLDOWN_DISABLE;
monitor_gpio_cfg.intr_type = GPIO_INTR_DISABLE;
TEST_ESP_OK(gpio_config(&monitor_gpio_cfg));
TEST_ESP_OK(gpio_set_level(TEST_ETM_MONITOR_GPIO, 0));
TEST_ESP_OK(gpio_set_level(TEST_ETM_MONITOR_GPIO_NUM, 0));
// Prime the comparator with a known initial low level before ETM-driven scans begin.
TEST_ESP_OK(gpio_set_level(src_gpio, 0));
@@ -407,11 +412,10 @@ TEST_CASE("ana_cmpr etm task periodic scan", "[ana_cmpr][etm]")
vTaskDelay(pdMS_TO_TICKS(10));
test_ana_cmpr_wait_output_level(cmpr, 0, false);
gptimer_alarm_config_t alarm_config = {
.reload_count = 0,
.alarm_count = TEST_ETM_SCAN_PERIOD_US,
.flags.auto_reload_on_alarm = true,
};
gptimer_alarm_config_t alarm_config = {};
alarm_config.reload_count = 0;
alarm_config.alarm_count = TEST_ETM_SCAN_PERIOD_US;
alarm_config.flags.auto_reload_on_alarm = true;
TEST_ESP_OK(gptimer_set_alarm_action(gptimer, &alarm_config));
test_ana_cmpr_etm_task_handles_t handles = test_ana_cmpr_init_etm_chain_v2(cmpr, gptimer);
@@ -421,20 +425,20 @@ TEST_CASE("ana_cmpr etm task periodic scan", "[ana_cmpr][etm]")
// demonstrating that the ETM-driven scans are working correctly.
TEST_ESP_OK(gptimer_start(gptimer));
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_ETM_MONITOR_GPIO));
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(gpio_set_level(src_gpio, 1));
vTaskDelay(pdMS_TO_TICKS(1));
test_ana_cmpr_wait_output_level(cmpr, 0, true);
TEST_ASSERT_EQUAL(1, gpio_get_level(TEST_ETM_MONITOR_GPIO));
TEST_ASSERT_EQUAL(1, gpio_get_level(TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(gpio_set_level(src_gpio, 0));
vTaskDelay(pdMS_TO_TICKS(1));
test_ana_cmpr_wait_output_level(cmpr, 0, false);
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_ETM_MONITOR_GPIO));
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_ETM_MONITOR_GPIO_NUM));
TEST_ESP_OK(gptimer_stop(gptimer));
TEST_ESP_OK(gpio_reset_pin(TEST_ETM_MONITOR_GPIO));
TEST_ESP_OK(gpio_reset_pin(TEST_ETM_MONITOR_GPIO_NUM));
test_ana_cmpr_deinit_etm_chain_v2(handles);
test_ana_cmpr_deinit(cmpr);
test_ana_cmpr_gptimer_deinit(gptimer);
@@ -7,6 +7,11 @@
#include "test_ana_cmpr.h"
#include "unity_test_utils_cache.h"
static inline gpio_num_t test_pad_gpio_num(int pad_gpio)
{
return static_cast<gpio_num_t>(pad_gpio);
}
typedef struct {
ana_cmpr_handle_t handle;
uint32_t count;
@@ -16,9 +21,9 @@ typedef struct {
static void IRAM_ATTR test_ana_cmpr_iram_safety(void *args)
{
test_ana_cmpr_data_t *data = (test_ana_cmpr_data_t *)args;
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD;
ref_cfg.ref_hys_level = ANA_CMPR_REF_HYS_LEVEL0;
ana_cmpr_set_internal_reference(data->handle, &ref_cfg);
ana_cmpr_debounce_config_t dbc_cfg = {
.wait_us = 1,
@@ -41,21 +46,24 @@ static void IRAM_ATTR test_ana_cmpr_iram_safety(void *args)
TEST_CASE("ana_cmpr works with cache disabled", "[ana_cmpr]")
{
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
.unit = TEST_ANA_CMPR_UNIT_ID,
.clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
.ref_src = ANA_CMPR_REF_SRC_INTERNAL,
.cross_type = ANA_CMPR_CROSS_ANY,
ana_cmpr_config_t config = {};
config.unit = TEST_ANA_CMPR_UNIT_ID;
config.clk_src = ANA_CMPR_CLK_SRC_DEFAULT;
config.ref_src = ANA_CMPR_REF_SRC_INTERNAL;
config.cross_type = ANA_CMPR_CROSS_ANY;
#if ANALOG_CMPR_LL_GET(IP_VERSION) > 1
.src_chan0_gpio = ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0],
.resample_limit = 3,
config.src_chan0_gpio = test_pad_gpio_num(ana_cmpr_periph[TEST_ANA_CMPR_UNIT_ID].pad_gpios[0]);
config.resample_limit = 3;
#else
config.src_chan0_gpio = GPIO_NUM_NC;
config.resample_limit = 0;
#endif
};
config.ext_ref_gpio = GPIO_NUM_NC;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
ana_cmpr_internal_ref_config_t ref_cfg = {
.ref_volt = ANA_CMPR_REF_VOLT_20_PCT_VDD,
};
ana_cmpr_internal_ref_config_t ref_cfg = {};
ref_cfg.ref_volt = ANA_CMPR_REF_VOLT_20_PCT_VDD;
ref_cfg.ref_hys_level = ANA_CMPR_REF_HYS_LEVEL0;
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_debounce_config_t dbc_cfg = {
.wait_us = 10,