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docs(parlio_tx): add programming guide

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Chen Jichang
2025-04-03 11:28:13 +08:00
parent 25cd10ce53
commit 487a306cdd
19 changed files with 1009 additions and 73 deletions
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components/esp_driver_parlio/src/parlio_tx.c
+6 -1
View File
@@ -255,10 +255,15 @@ esp_err_t parlio_tx_get_alignment_constraints(parlio_tx_unit_t *tx_unit, size_t
static esp_err_t parlio_select_periph_clock(parlio_tx_unit_t *tx_unit, const parlio_tx_unit_config_t *config)
{
parlio_hal_context_t *hal = &tx_unit->base.group->hal;
parlio_clock_source_t clk_src = config->clk_in_gpio_num >= 0 ? PARLIO_CLK_SRC_EXTERNAL : config->clk_src;
parlio_clock_source_t clk_src = config->clk_src;
if (config->clk_in_gpio_num >= 0 && clk_src != PARLIO_CLK_SRC_EXTERNAL) {
ESP_LOGW(TAG, "input clock GPIO is set, use external clk src");
clk_src = PARLIO_CLK_SRC_EXTERNAL;
}
uint32_t periph_src_clk_hz = 0;
// if the source clock is input from the GPIO, then we're in the slave mode
if (clk_src == PARLIO_CLK_SRC_EXTERNAL) {
ESP_RETURN_ON_FALSE(config->clk_in_gpio_num >= 0, ESP_ERR_INVALID_ARG, TAG, "invalid input clock GPIO number");
periph_src_clk_hz = config->input_clk_src_freq_hz;
} else {
// get the internal clock source frequency
components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c
+1 -1
View File
@@ -410,7 +410,7 @@ TEST_CASE("parallel tx unit use external non-free running clock", "[parlio_tx]")
printf("install parlio tx unit\r\n");
parlio_tx_unit_handle_t tx_unit = NULL;
parlio_tx_unit_config_t config = {
.clk_src = PARLIO_CLK_SRC_DEFAULT,
.clk_src = PARLIO_CLK_SRC_EXTERNAL,
.data_width = 8,
.clk_in_gpio_num = TEST_EXT_CLK_GPIO,
.input_clk_src_freq_hz = 80 * 1000 * 1000, // Note that this is not the real input frequency, we just use it to calculate the clock divider