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Merge branch 'feature/support_i2s_on_p4_eco5_v5.4' into 'release/v5.4'

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change(i2s): update i2s soc and hal for p4 hw_ver3 (v5.4)

See merge request espressif/esp-idf!42739
This commit is contained in:
morris
2025-11-12 10:16:16 +08:00
parent f483e9fa4c fbf49d795a
commit 479727d89a
6 changed files with 7 additions and 1021 deletions
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components/soc/esp32p4/include/soc/clk_tree_defs.h
+1 -1
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@@ -332,7 +332,7 @@ typedef enum {
/**
* @brief Array initializer for all supported clock sources of I2S
*/
#define SOC_I2S_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_APLL, I2S_CLK_SRC_EXTERNAL}
#define SOC_I2S_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_APLL, I2S_CLK_SRC_EXTERNAL}
/**
* @brief I2S clock source enum
components/soc/esp32p4/register/hw_ver1/soc/i2s_struct.h
+2 -5
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -282,10 +282,7 @@ typedef union {
*/
typedef union {
struct {
/** tx_pdm_hp_bypass : R/W; bitpos: [0]; default: 0;
* I2S TX PDM bypass hp filter or not. The option has been removed.
*/
uint32_t tx_pdm_hp_bypass:1;
uint32_t reserved_0:1;
/** tx_pdm_sinc_osr2 : R/W; bitpos: [4:1]; default: 2;
* I2S TX PDM OSR2 value
*/
components/soc/esp32p4/register/hw_ver3/soc/i2s_eco5_struct.h
-1009
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File diff suppressed because it is too large Load Diff
components/soc/esp32p4/register/hw_ver3/soc/i2s_struct.h
+1 -4
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@@ -282,10 +282,7 @@ typedef union {
*/
typedef union {
struct {
/** tx_pdm_hp_bypass : R/W; bitpos: [0]; default: 0;
* I2S TX PDM bypass hp filter or not. The option has been removed.
*/
uint32_t tx_pdm_hp_bypass:1;
uint32_t reserved_0:1;
/** tx_pdm_sinc_osr2 : R/W; bitpos: [4:1]; default: 2;
* I2S TX PDM OSR2 value
*/