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fix(gpio): add esp_gpio_reserve check to gpio_config
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@@ -364,6 +364,36 @@ esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)
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do {
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if (((gpio_pin_mask >> io_num) & BIT(0))) {
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// This function will set the pin to a certain mode, instead of adding new modes to current status
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// If GPIO_MODE_DEF_OUTPUT flag is not set, output will be disabled; Same for GPIO_MODE_DEF_INPUT flag
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// Also the func sel will always be set to GPIO function in this function
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// so IO conflict check is tight here
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uint64_t bit_mask = BIT64(io_num);
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bool conflict = false;
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// No need to reserve any pin for reading pad level (and do input check first, since output needs reserve IO which will make esp_gpio_is_reserved return true)
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// but if the pin has been used as an IOMUX input, neither it can be configured to GPIO function, nor input can be disabled
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if (esp_gpio_is_reserved(bit_mask) && gpio_hal_input_is_enabled(gpio_context.gpio_hal, io_num)) {
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conflict = true;
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}
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// Currently, we have no way to know if an IO has been used as a GPIO matrix input (no reserve for this case),
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// so we cannot check such case and skip if input will be disabled
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if ((pGPIOConfig->mode) & GPIO_MODE_DEF_OUTPUT) {
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// need to reserve the pin if it is used as an output
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uint64_t old_busy_mask = esp_gpio_reserve(bit_mask);
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if (old_busy_mask & bit_mask) {
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conflict = true;
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}
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} else {
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// gpio output will be disabled, so should skip for any reserved output pins
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if (esp_gpio_is_reserved(bit_mask) && !gpio_hal_input_is_enabled(gpio_context.gpio_hal, io_num)) {
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conflict = true;
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}
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}
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if (conflict) {
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ESP_LOGW(GPIO_TAG, "conflict found for GPIO[%"PRIu32"]", io_num);
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// Right now, we just give a warning
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// Later, we should skip the pin and continue with the next one
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}
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#if SOC_RTCIO_PIN_COUNT > 0
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if (rtc_gpio_is_valid_gpio(io_num)) {
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