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refactor(sdm): move sleep retention config into driver layer

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Move SDM regdma retention descriptors out of esp_hal_gpio and into
per-target
esp_driver_sdm sources so the driver owns its backup scope and restore
flow.
This commit is contained in:
morris
2026-07-06 15:09:37 +08:00
parent 442cc028b5
commit 4704a99af3
18 changed files with 305 additions and 235 deletions
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components/esp_driver_sdm/CMakeLists.txt
+4
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@@ -10,10 +10,14 @@ set(priv_requires esp_pm esp_driver_gpio)
set(requires esp_hal_gpio)
if(CONFIG_SOC_SDM_SUPPORTED)
list(APPEND srcs "src/sdm.c")
if(CONFIG_SOC_PAU_SUPPORTED)
list(APPEND srcs "src/${target}/sdm_retention.c")
endif()
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_INCLUDE_DIRS "src"
PRIV_REQUIRES "${priv_requires}"
REQUIRES "${requires}"
LDFRAGMENTS "linker.lf"
components/esp_driver_sdm/src/esp32c5/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32c6/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x20f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32h2/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x20f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32h21/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA_MISC_REG
* GPIO_EXT_SIGMADELTA[x]_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32h4/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32p4/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 9
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x2ff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/esp32s31/sdm_retention.c
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdm_priv.h"
#include "soc/gpio_ext_reg.h"
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 9
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1ff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const sdm_reg_retention_info_t sdm_reg_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_driver_sdm/src/sdm.c
+7 -6
View File
@@ -35,6 +35,7 @@
#include "esp_private/gpio.h"
#include "esp_private/sleep_retention.h"
#include "esp_private/esp_gpio_reserve.h"
#include "sdm_priv.h"
#if CONFIG_SDM_OBJ_CACHE_SAFE
#define SDM_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
@@ -92,16 +93,16 @@ static sdm_platform_t s_platform;
static esp_err_t sdm_create_sleep_retention_link_cb(void *group)
{
int group_id = ((sdm_group_t *)group)->group_id;
esp_err_t err = sleep_retention_entries_create(soc_sdm_retention_infos[group_id].regdma_entry_array,
soc_sdm_retention_infos[group_id].array_size,
REGDMA_LINK_PRI_SDM, soc_sdm_retention_infos[group_id].module);
esp_err_t err = sleep_retention_entries_create(sdm_reg_retention_infos[group_id].regdma_entry_array,
sdm_reg_retention_infos[group_id].array_size,
REGDMA_LINK_PRI_SDM, sdm_reg_retention_infos[group_id].module);
return err;
}
static void sdm_create_retention_module(sdm_group_t *group)
{
int group_id = group->group_id;
sleep_retention_module_t module = soc_sdm_retention_infos[group_id].module;
sleep_retention_module_t module = sdm_reg_retention_infos[group_id].module;
_lock_acquire(&s_platform.mutex);
if (sleep_retention_is_module_inited(module) && !sleep_retention_is_module_created(module)) {
if (sleep_retention_module_allocate(module) != ESP_OK) {
@@ -154,7 +155,7 @@ static esp_err_t sdm_group_install(sdm_group_t *group, soc_module_clk_t clk_src)
}
#if SDM_USE_RETENTION_LINK
sleep_retention_module_t module = soc_sdm_retention_infos[group_id].module;
sleep_retention_module_t module = sdm_reg_retention_infos[group_id].module;
sleep_retention_module_init_param_t init_param = {
.cbs = {
.create = {
@@ -235,7 +236,7 @@ static void sdm_group_uninstall(sdm_group_t *group)
}
#if SDM_USE_RETENTION_LINK
sleep_retention_module_t module = soc_sdm_retention_infos[group->group_id].module;
sleep_retention_module_t module = sdm_reg_retention_infos[group->group_id].module;
sleep_retention_module_detach(module);
if (sleep_retention_is_module_created(module)) {
sleep_retention_module_free(module);
components/esp_driver_sdm/src/sdm_priv.h
+35
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@@ -0,0 +1,35 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stddef.h>
#include "soc/soc_caps.h"
#include "hal/sdm_caps.h"
#if SOC_PAU_SUPPORTED
#include "soc/regdma.h"
#include "soc/retention_periph_defs.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_PAU_SUPPORTED
typedef struct {
const periph_retention_module_t module;
const regdma_entries_config_t *regdma_entry_array;
const size_t array_size;
} sdm_reg_retention_info_t;
extern const sdm_reg_retention_info_t sdm_reg_retention_infos[SDM_CAPS_GET(INST_NUM)];
#endif // SOC_PAU_SUPPORTED
#ifdef __cplusplus
}
#endif
components/esp_hal_gpio/esp32c5/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -27,32 +26,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32c6/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -27,32 +26,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x20f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32h2/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -27,32 +26,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x20f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32h21/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -27,32 +26,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA_MISC_REG
* GPIO_EXT_SIGMADELTA[x]_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32h4/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -27,32 +26,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 5
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32p4/sdm_periph.c
-30
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -39,32 +38,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 9
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x0)
static const uint32_t gpio_ext_regs_map[4] = {0x2ff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
components/esp_hal_gpio/esp32s31/sdm_periph.c
-32
View File
@@ -6,7 +6,6 @@
#include "hal/sdm_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_ext_reg.h"
const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
[0] = {
@@ -39,34 +38,3 @@ const soc_sdm_signal_desc_t soc_sdm_signals[1] = {
}
}
};
#if SOC_PAU_SUPPORTED
/**
* @brief Registers in retention context:
* GPIO_EXT_SIGMADELTA[x]_REG
* GPIO_EXT_SIGMADELTA_MISC_REG
*/
#define GPIO_EXT_RETENTION_REGS_CNT 9
#define GPIO_EXT_RETENTION_REGS_BASE (DR_REG_GPIO_EXT_BASE + 0x4)
static const uint32_t gpio_ext_regs_map[4] = {0x1ff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t gpio_ext_regdma_entries[] = {
// backup stage: save configuration and status registers
// restore stage: restore the configuration and status registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00),
GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE,
GPIO_EXT_RETENTION_REGS_CNT, 0, 0,
gpio_ext_regs_map[0], gpio_ext_regs_map[1],
gpio_ext_regs_map[2], gpio_ext_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_sdm_retention_desc_t soc_sdm_retention_infos[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_SDM0,
.regdma_entry_array = gpio_ext_regdma_entries,
.array_size = ARRAY_SIZE(gpio_ext_regdma_entries)
}
};
#endif // SOC_PAU_SUPPORTED
components/esp_hal_gpio/include/hal/sdm_periph.h
-17
View File
@@ -10,11 +10,6 @@
#include <stddef.h>
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#if SOC_HAS(PAU)
#include "soc/retention_periph_defs.h"
#endif // SOC_HAS(PAU)
#ifdef __cplusplus
extern "C" {
@@ -32,18 +27,6 @@ typedef struct {
extern const soc_sdm_signal_desc_t soc_sdm_signals[SDM_CAPS_GET(INST_NUM)];
#if SOC_HAS(PAU)
typedef struct {
const periph_retention_module_t module; // ID of the SDM as a retention module
const regdma_entries_config_t *regdma_entry_array; // Array of regdma entries for retention
const size_t array_size; // Size of the regdma_entry_array
} soc_sdm_retention_desc_t;
extern const soc_sdm_retention_desc_t soc_sdm_retention_infos[SDM_CAPS_GET(INST_NUM)];
#endif // SOC_HAS(PAU)
#endif // SOC_HAS(SDM)
#ifdef __cplusplus