Power Management: support PAU REGDMA feature for esp32h2

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -171,6 +171,10 @@ config SOC_LP_TIMER_SUPPORTED
     bool
     default y
 
+config SOC_PAU_SUPPORTED
+    bool
+    default y
+
 config SOC_CLK_TREE_SUPPORTED
     bool
     default y
@@ -1095,6 +1099,10 @@ config SOC_PM_SUPPORT_VDDSDIO_PD
     bool
     default y
 
+config SOC_PM_PAU_LINK_NUM
+    int
+    default 4
+
 config SOC_PM_CPU_RETENTION_BY_SW
     bool
     default y
@@ -1103,6 +1111,10 @@ config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
     bool
     default y
 
+config SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default y

components/soc/esp32h2/include/soc/pau_struct.h

@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -334,7 +334,7 @@ typedef union {
 } pau_date_reg_t;
 
 
-typedef struct {
+typedef struct pau_dev_t {
     volatile pau_regdma_conf_reg_t regdma_conf;
     volatile pau_regdma_clk_conf_reg_t regdma_clk_conf;
     volatile pau_regdma_etm_ctrl_reg_t regdma_etm_ctrl;

components/soc/esp32h2/include/soc/periph_defs.h

@@ -41,6 +41,7 @@ typedef enum {
     PERIPH_SYSTIMER_MODULE,
     PERIPH_SARADC_MODULE,
     PERIPH_TEMPSENSOR_MODULE,
+    PERIPH_REGDMA_MODULE,
 /* Peripherals clock managed by the modem_clock driver must be listed last in the enumeration */
     PERIPH_BT_MODULE,
     PERIPH_IEEE802154_MODULE,

components/soc/esp32h2/include/soc/soc_caps.h

@@ -68,6 +68,7 @@
 #define SOC_APM_SUPPORTED               1
 #define SOC_PMU_SUPPORTED               1
 #define SOC_LP_TIMER_SUPPORTED          1
+#define SOC_PAU_SUPPORTED               1
 #define SOC_CLK_TREE_SUPPORTED          1
 
 /*-------------------------- XTAL CAPS ---------------------------------------*/
@@ -459,8 +460,10 @@
 #define SOC_PM_SUPPORT_RC32K_PD         (1)
 #define SOC_PM_SUPPORT_RC_FAST_PD       (1)
 #define SOC_PM_SUPPORT_VDDSDIO_PD       (1)
+#define SOC_PM_PAU_LINK_NUM             (4)
 #define SOC_PM_CPU_RETENTION_BY_SW      (1)
 #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */
+#define SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (1)
 
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (1)