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feat(uart): add RCC atomic block to uart/lp-uart peripheral

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This commit is contained in:
gaoxu
2023-10-08 10:10:02 +08:00
parent c7afa0dcef
commit 4541ad134d
21 changed files with 643 additions and 168 deletions
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components/esp_system/port/cpu_start.c
+12 -1
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@@ -91,6 +91,7 @@
#include "esp_cpu.h"
#include "esp_private/esp_clk.h"
#include "spi_flash_mmap.h"
#include "esp_private/periph_ctrl.h"
#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX
#include "esp_private/trax.h"
@@ -143,6 +144,13 @@ static volatile bool s_cpu_inited[SOC_CPU_CORES_NUM] = { false };
static volatile bool s_resume_cores;
#endif
#if CONFIG_IDF_TARGET_ESP32P4
#define UART_START_SCLK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
// #define UART_START_SCLK_ATOMIC() for(int i = 1, __DECLARE_RCC_ATOMIC_ENV; i < 1; i--)
#define UART_START_SCLK_ATOMIC() int __DECLARE_RCC_ATOMIC_ENV;
#endif
static void core_intr_matrix_clear(void)
{
uint32_t core_id = esp_cpu_get_core_id();
@@ -682,7 +690,10 @@ void IRAM_ATTR call_start_cpu0(void)
clock_hz = esp_clk_xtal_freq(); // From esp32-s3 on, UART clock source is selected to XTAL in ROM
#endif
esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
esp_rom_uart_set_clock_baudrate(CONFIG_ESP_CONSOLE_UART_NUM, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
UART_START_SCLK_ATOMIC() {
(void) __DECLARE_RCC_ATOMIC_ENV; // To avoid build warning about __DECLARE_RCC_ATOMIC_ENV defined but not used on P4
esp_rom_uart_set_clock_baudrate(CONFIG_ESP_CONSOLE_UART_NUM, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
}
#endif
#endif