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Merge branch 'feat/spi_slave_edma_psram_support_v6.0' into 'release/v6.0'

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fix(driver_spi): added slave/slave_hd edma support, and add master bit length check, internal mem length check (v6.0)

See merge request espressif/esp-idf!46349
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morris
2026-03-19 22:57:43 +08:00
parent fc8f545f62 19131099ea
commit 412e20f189
35 changed files with 735 additions and 498 deletions
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docs/en/api-reference/peripherals/spi_master.rst
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@@ -852,6 +852,10 @@ Please note that the ISR is disabled during flash operation by default. To keep
4. ``cs_ena_pretrans`` is not compatible with the Command and Address phases of full-duplex transactions.
.. only:: esp32
5. If DMA is enabled, the RX buffer should be word-aligned (starting from a 32-bit boundary and having a length of multiples of 4 bytes). Otherwise, DMA may overwrite the data in the unaligned part.
Application Examples
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