Merge branch 'feat/spi_slave_edma_psram_support_v6.0' into 'release/v6.0'

fix(driver_spi): added slave/slave_hd edma support, and add master bit length check, internal mem length check (v6.0)

See merge request espressif/esp-idf!46349

components/esp_hal_gpspi/include/hal/spi_slave_hal.h

@@ -172,6 +172,23 @@ void spi_slave_hal_user_start(const spi_slave_hal_context_t *hal);
  */
 bool spi_slave_hal_usr_is_done(spi_slave_hal_context_t* hal);
 
+/**
+ * Get SPI interrupt bits status by mask
+ *
+ * @param hal Context of the HAL layer.
+ * @param mask Mask of the interrupt bits to check.
+ * @return True if the masked interrupts are set, false otherwise.
+ */
+bool spi_slave_hal_get_intr_status(spi_slave_hal_context_t *hal, uint32_t mask);
+
+/**
+ * Clear SPI interrupt bits by mask
+ *
+ * @param hal Context of the HAL layer.
+ * @param mask Mask of the interrupt bits to clear.
+ */
+void spi_slave_hal_clear_intr_status(spi_slave_hal_context_t *hal, uint32_t mask);
+
 /**
  * Post transaction operations, fetch data from the buffer and recorded the length.
  *

components/esp_hal_gpspi/include/hal/spi_slave_hd_hal.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -138,6 +138,15 @@ void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_h
  */
 bool spi_slave_hd_hal_check_clear_event(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
 
+/**
+ * @brief Check and clear the interrupt by mask
+ *
+ * @param hal       Context of the HAL layer
+ * @param mask      Mask of the interrupt bits to check
+ * @return          True if the masked interrupts are set, false otherwise
+ */
+bool spi_slave_hd_hal_check_clear_intr(spi_slave_hd_hal_context_t *hal, uint32_t mask);
+
 /**
  * @brief Check and clear the interrupt of one event.
  *

components/esp_hal_gpspi/spi_slave_hal_iram.c

@@ -99,3 +99,15 @@ bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal)
 #endif // SPI_LL_SLAVE_NEEDS_RESET_WORKAROUND
     return ret;
 }
+
+#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
+bool spi_slave_hal_get_intr_status(spi_slave_hal_context_t *hal, uint32_t mask)
+{
+    return spi_ll_get_intr(hal->hw, mask);
+}
+
+void spi_slave_hal_clear_intr_status(spi_slave_hal_context_t *hal, uint32_t mask)
+{
+    spi_ll_clear_intr(hal->hw, mask);
+}
+#endif

components/esp_hal_gpspi/spi_slave_hd_hal.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -154,16 +154,20 @@ static spi_ll_intr_t get_event_intr(spi_slave_hd_hal_context_t *hal, spi_event_t
     return intr;
 }
 
-bool spi_slave_hd_hal_check_clear_event(spi_slave_hd_hal_context_t *hal, spi_event_t ev)
+bool spi_slave_hd_hal_check_clear_intr(spi_slave_hd_hal_context_t *hal, uint32_t mask)
 {
-    spi_ll_intr_t intr = get_event_intr(hal, ev);
-    if (spi_ll_get_intr(hal->dev, intr)) {
-        spi_ll_clear_intr(hal->dev, intr);
+    if (spi_ll_get_intr(hal->dev, mask)) {
+        spi_ll_clear_intr(hal->dev, mask);
         return true;
     }
     return false;
 }
 
+bool spi_slave_hd_hal_check_clear_event(spi_slave_hd_hal_context_t *hal, spi_event_t ev)
+{
+    return spi_slave_hd_hal_check_clear_intr(hal, get_event_intr(hal, ev));
+}
+
 bool spi_slave_hd_hal_check_disable_event(spi_slave_hd_hal_context_t *hal, spi_event_t ev)
 {
     //The trans_done interrupt is used for the workaround when some interrupt is not writable