diff --git a/components/esp_hal_rtc_timer/README.md b/components/esp_hal_rtc_timer/README.md
index ae52a7baed1..57235984e1c 100644
--- a/components/esp_hal_rtc_timer/README.md
+++ b/components/esp_hal_rtc_timer/README.md
@@ -14,6 +14,7 @@ The component consolidates timer functionality from two different hardware imple
 
 ### Unified HAL API (All Chips)
 - Wakeup timer configuration via `rtc_timer_hal_set_wakeup_time()`
+- Wakeup timer clear/disarm via `rtc_timer_hal_clear_wakeup_time()`
 - RTC time reading via `rtc_timer_hal_get_cycle_count()`
 
 ### Hardware-Specific LL API
diff --git a/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h
index f11394dab53..c3e58693957 100644
--- a/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -30,6 +30,18 @@ FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t t
     WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID (ignored for V1 hardware, only one timer supported)
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    (void)timer_id; // V1 hardware only supports one timer
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32c2/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32c2/include/hal/rtc_timer_ll.h
index 88d03af43d3..5c2f1b76528 100644
--- a/components/esp_hal_rtc_timer/esp32c2/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32c2/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -31,6 +31,18 @@ FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t t
     SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID (ignored for V1 hardware, only one timer supported)
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    (void)timer_id; // V1 hardware only supports one timer
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32c3/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32c3/include/hal/rtc_timer_ll.h
index 88d03af43d3..5c2f1b76528 100644
--- a/components/esp_hal_rtc_timer/esp32c3/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32c3/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -31,6 +31,18 @@ FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t t
     SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID (ignored for V1 hardware, only one timer supported)
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    (void)timer_id; // V1 hardware only supports one timer
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32c5/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32c5/include/hal/rtc_timer_ll.h
index 69a90ebf784..bdc28591124 100644
--- a/components/esp_hal_rtc_timer/esp32c5/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32c5/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -103,11 +103,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32c6/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32c6/include/hal/rtc_timer_ll.h
index e8453112c78..3636e5697d4 100644
--- a/components/esp_hal_rtc_timer/esp32c6/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32c6/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -103,11 +103,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32c61/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32c61/include/hal/rtc_timer_ll.h
index 8ca7fd007ae..d45c641856c 100644
--- a/components/esp_hal_rtc_timer/esp32c61/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32c61/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -103,11 +103,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32h2/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32h2/include/hal/rtc_timer_ll.h
index cac6610bb9a..a77dfd02261 100644
--- a/components/esp_hal_rtc_timer/esp32h2/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32h2/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -92,11 +92,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  * Note: For ESP32-H2, counter[timer_id] is used after snapshot
diff --git a/components/esp_hal_rtc_timer/esp32h21/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32h21/include/hal/rtc_timer_ll.h
index b7e9b7c6e8d..59ce7e04042 100644
--- a/components/esp_hal_rtc_timer/esp32h21/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32h21/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -92,11 +92,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  * Note: For ESP32-H21, counter[timer_id] is used after snapshot
diff --git a/components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h
index b891a92753e..dcca4c16c73 100644
--- a/components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -109,11 +109,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_record_regdma_work_time_enable(lp_timer_dev_
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32p4/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32p4/include/hal/rtc_timer_ll.h
index 4651754a581..d4d66180133 100644
--- a/components/esp_hal_rtc_timer/esp32p4/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32p4/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -103,11 +103,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  * Note: For ESP32-P4, counter[timer_id] is used after snapshot
diff --git a/components/esp_hal_rtc_timer/esp32s2/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32s2/include/hal/rtc_timer_ll.h
index 415379f8abc..5d9206e6616 100644
--- a/components/esp_hal_rtc_timer/esp32s2/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32s2/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -31,6 +31,18 @@ FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t t
     SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID (ignored for V1 hardware, only one timer supported)
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    (void)timer_id; // V1 hardware only supports one timer
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32s3/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32s3/include/hal/rtc_timer_ll.h
index 7e33a7f1370..ed2c12bc36d 100644
--- a/components/esp_hal_rtc_timer/esp32s3/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32s3/include/hal/rtc_timer_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -32,6 +32,18 @@ FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t t
     SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID (ignored for V1 hardware, only one timer supported)
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    (void)timer_id; // V1 hardware only supports one timer
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/esp32s31/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32s31/include/hal/rtc_timer_ll.h
index db8ce18894a..3868a7c2e75 100644
--- a/components/esp_hal_rtc_timer/esp32s31/include/hal/rtc_timer_ll.h
+++ b/components/esp_hal_rtc_timer/esp32s31/include/hal/rtc_timer_ll.h
@@ -106,11 +106,23 @@ FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(rtc_timer_dev_t *dev, uint
  */
 FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
 {
+    rtc_timer_ll_set_target_enable(&RTC_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&RTC_TIMER, timer_id);
     rtc_timer_ll_set_alarm_target(&RTC_TIMER, timer_id, ticks);
     rtc_timer_ll_set_target_enable(&RTC_TIMER, timer_id, true);
 }
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm enabled by rtc_timer_ll_set_wakeup_time()
+ *
+ * @param timer_id Timer ID
+ */
+FORCE_INLINE_ATTR void rtc_timer_ll_clear_wakeup_time(uint8_t timer_id)
+{
+    rtc_timer_ll_set_target_enable(&RTC_TIMER, timer_id, false);
+    rtc_timer_ll_clear_alarm_intr_status(&RTC_TIMER, timer_id);
+}
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/include/hal/rtc_timer_hal.h b/components/esp_hal_rtc_timer/include/hal/rtc_timer_hal.h
index e3bd75ee701..5cb2e7b3e1f 100644
--- a/components/esp_hal_rtc_timer/include/hal/rtc_timer_hal.h
+++ b/components/esp_hal_rtc_timer/include/hal/rtc_timer_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -23,6 +23,16 @@ extern "C" {
  */
 #define rtc_timer_hal_set_wakeup_time(timer_id, ticks)         rtc_timer_ll_set_wakeup_time(timer_id, ticks)
 
+/**
+ * @brief Clear/disarm the wakeup timer alarm
+ *
+ * Disables the comparator left armed by rtc_timer_hal_set_wakeup_time() and
+ * clears any pending alarm interrupt status.
+ *
+ * @param timer_id Timer ID
+ */
+#define rtc_timer_hal_clear_wakeup_time(timer_id)              rtc_timer_ll_clear_wakeup_time(timer_id)
+
 /**
  * @brief Get current RTC timer cycle count
  *
diff --git a/components/esp_hal_rtc_timer/test_apps/main/test_rtc_timer.c b/components/esp_hal_rtc_timer/test_apps/main/test_rtc_timer.c
index 0906a9523d7..262088de301 100644
--- a/components/esp_hal_rtc_timer/test_apps/main/test_rtc_timer.c
+++ b/components/esp_hal_rtc_timer/test_apps/main/test_rtc_timer.c
@@ -102,7 +102,6 @@ static void assert_alarm_interrupt_round_trip(uint8_t timer_id)
     uint64_t delay_ticks = rtc_time_us_to_slowclk(RTC_TIMER_ALARM_DELAY_US, period);
     const uint32_t raw_mask = get_alarm_intr_mask(timer_id);
 
-    rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_alarm_intr_enable(&LP_TIMER, timer_id, false);
     rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
     TEST_ASSERT_EQUAL_HEX32(0, rtc_timer_ll_get_intr_raw(&LP_TIMER, timer_id) & raw_mask);