Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

feat(lcd): add MIPI-to-HDMI example (lt9611)

Browse Source
This commit is contained in:
Chen Jichang
2026-09-22 14:53:08 +08:00
parent a86a78bb6a
commit 4119f2d7f1
20 changed files with 632 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h
+4 -1
View File
@@ -9,6 +9,7 @@
#include <stdbool.h>
#include <stdint.h>
#include "hal/assert.h"
#include "soc/mipi_dsi_bridge_reg.h"
#include "soc/mipi_dsi_bridge_struct.h"
#include "hal/mipi_dsi_types.h"
#include "hal/lcd_types.h"
@@ -16,6 +17,8 @@
#define MIPI_DSI_LL_GET_BRG(bus_id) (bus_id == 0 ? &MIPI_DSI_BRIDGE : NULL)
#define MIPI_DSI_BRG_HTOTAL_MAX DSI_BRG_HTOTAL_V
#define MIPI_DSI_BRG_LL_EVENT_UNDERRUN (1 << 0)
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
#define MIPI_DSI_BRG_LL_EVENT_VSYNC (1 << 1)
@@ -212,7 +215,7 @@ static inline void mipi_dsi_brg_ll_set_horizontal_timing(dsi_brg_dev_t *dev, uin
* @brief Set the under run discard count for the bridge controller
*
* @param dev Pointer to the DSI bridge controller register base address
* @param under_run_discard_count Under run discard count
* @param under_run_discard_count Trigger underrun interrupt when underrun occurs and line_cnt is less than this field.
*/
static inline void mipi_dsi_brg_ll_set_underrun_discard_count(dsi_brg_dev_t *dev, uint32_t under_run_discard_count)
{
components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_host_ll.h
+17 -12
View File
@@ -51,15 +51,6 @@ typedef enum {
MIPI_DSI_LL_COLOR_CODE_24BIT = 5, // 24-bit
} mipi_dsi_ll_color_coding_t;
/**
* @brief MIPI DSI Video mode burst type
*/
typedef enum {
MIPI_DSI_LL_VIDEO_NON_BURST_WITH_SYNC_PULSES, // Non-burst mode with sync pulses
MIPI_DSI_LL_VIDEO_NON_BURST_WITH_SYNC_EVENTS, // Non-burst mode with sync events
MIPI_DSI_LL_VIDEO_BURST_WITH_SYNC_PULSES, // Burst mode with sync pulses
} mipi_dsi_ll_video_burst_type_t;
/**
* @brief Set the DSI Host controller power state
*
@@ -284,11 +275,25 @@ static inline void mipi_dsi_host_ll_dpi_enable_lp_command(dsi_host_dev_t *dev, b
* @brief Set MIPI DSI video burst type
*
* @param dev Pointer to the DSI Host controller register base address
* @param mode Video mode type
* @param type Video burst type
*/
static inline void mipi_dsi_host_ll_dpi_set_video_burst_type(dsi_host_dev_t *dev, mipi_dsi_ll_video_burst_type_t type)
static inline void mipi_dsi_host_ll_dpi_set_video_burst_type(dsi_host_dev_t *dev, mipi_dsi_video_burst_type_t type)
{
dev->vid_mode_cfg.vid_mode_type = type;
// Public enum order is not the DSI Host VID_MODE_TYPE encoding.
switch (type) {
case MIPI_DSI_VIDEO_NON_BURST_WITH_SYNC_PULSES:
dev->vid_mode_cfg.vid_mode_type = 0;
break;
case MIPI_DSI_VIDEO_NON_BURST_WITH_SYNC_EVENTS:
dev->vid_mode_cfg.vid_mode_type = 1;
break;
case MIPI_DSI_VIDEO_BURST_WITH_SYNC_PULSES:
dev->vid_mode_cfg.vid_mode_type = 2;
break;
default:
HAL_ASSERT(false);
break;
}
}
/**