mirror of
https://github.com/espressif/esp-idf.git
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feat(dma2d): added async color convert driver
This commit is contained in:
morris
@@ -0,0 +1,470 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdatomic.h>
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#include <sys/queue.h>
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#include <inttypes.h>
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#include <assert.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_check.h"
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#include "esp_cache.h"
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#include "esp_private/esp_cache_private.h"
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#include "esp_heap_caps.h"
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#include "esp_memory_utils.h"
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#include "esp_async_color_convert_priv.h"
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#include "soc/dma2d_channel.h"
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#include "hal/dma2d_types.h"
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#include "hal/dma2d_ll.h"
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#include "hal/color_hal.h"
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ESP_LOG_ATTR_TAG(TAG, "async_color_dma2d");
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typedef struct async_color_convert_dma2d_context_t async_color_convert_dma2d_context_t;
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typedef struct async_color_convert_transaction async_color_convert_transaction_t;
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struct async_color_convert_transaction {
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// Keep descriptors in dedicated cache-line-sized allocations so cache sync only
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// touches descriptor state, not the surrounding transaction metadata.
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dma2d_descriptor_t *tx_desc; // TX descriptor used by DMA2D source channel
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dma2d_descriptor_t *rx_desc; // RX descriptor used by DMA2D destination channel
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dma2d_trans_t *dma2d_trans_placeholder; // Opaque DMA2D transaction object storage
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dma2d_trans_config_t dma2d_trans_config; // Per-request DMA2D transaction configuration
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async_color_convert_request_t request; // Cached user request used to build DMA2D transaction
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dma2d_csc_config_t tx_csc; // Cached DMA2D CSC configuration resolved in task context
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async_color_convert_isr_cb_t cb_isr; // User ISR callback for this request
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void *cb_args; // User callback argument
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async_color_convert_dma2d_context_t *ctx; // Back pointer to parent context
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STAILQ_ENTRY(async_color_convert_transaction) queue_entry; // Node in idle transaction queue
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};
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struct async_color_convert_dma2d_context_t {
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async_color_convert_context_t parent; // Base interface used by common API wrappers
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dma2d_pool_handle_t pool; // DMA2D pool handle for enqueue/dequeue scheduling
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size_t dma_burst_size; // DMA burst size applied on job picked
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size_t desc_alloc_size; // Cache-line-sized DMA2D descriptor allocation size
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portMUX_TYPE spinlock; // Protects idle_queue
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uint32_t num_trans_objs; // Total number of transaction objects in trans_pool
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_Atomic uint32_t idle_num; // Number of currently available transaction objects
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_Atomic bool deleting; // Whether uninstall is in progress
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async_color_convert_transaction_t *trans_pool; // Pre-allocated transaction object pool
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STAILQ_HEAD(, async_color_convert_transaction) idle_queue; // Queue of available transaction objects
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};
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static esp_err_t async_color_convert_dma2d_del(async_color_convert_context_t *ctx);
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static esp_err_t async_color_convert_dma2d_convert(async_color_convert_context_t *ctx,
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const async_color_convert_request_t *request,
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async_color_convert_isr_cb_t cb_isr,
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void *cb_args);
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static bool try_convert_request_to_dma2d_csc(const async_color_convert_request_t *request,
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dma2d_csc_config_t *out_tx_csc)
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{
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esp_color_fourcc_t src_fourcc = request->src_color_format;
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esp_color_fourcc_t dst_fourcc = request->dst_color_format;
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if (src_fourcc == dst_fourcc) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_NONE;
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out_tx_csc->pre_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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out_tx_csc->post_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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return true;
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}
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if (src_fourcc == ESP_COLOR_FOURCC_RGB16 && dst_fourcc == ESP_COLOR_FOURCC_BGR24) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_RGB565_TO_RGB888;
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out_tx_csc->pre_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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out_tx_csc->post_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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return true;
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}
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if (src_fourcc == ESP_COLOR_FOURCC_BGR24 && dst_fourcc == ESP_COLOR_FOURCC_RGB16) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_RGB888_TO_RGB565;
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out_tx_csc->pre_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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out_tx_csc->post_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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return true;
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}
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if (src_fourcc == ESP_COLOR_FOURCC_BGR24 && dst_fourcc == ESP_COLOR_FOURCC_UYVY) {
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if (request->color_conv_std == COLOR_CONV_STD_RGB_YUV_BT601) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_RGB888_TO_YUV422_601;
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} else if (request->color_conv_std == COLOR_CONV_STD_RGB_YUV_BT709) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_RGB888_TO_YUV422_709;
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} else {
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return false;
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}
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out_tx_csc->pre_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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out_tx_csc->post_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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return true;
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}
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if (src_fourcc == ESP_COLOR_FOURCC_UYVY && dst_fourcc == ESP_COLOR_FOURCC_BGR24) {
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if (request->color_conv_std == COLOR_CONV_STD_RGB_YUV_BT601) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_YUV422_TO_RGB888_601;
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} else if (request->color_conv_std == COLOR_CONV_STD_RGB_YUV_BT709) {
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out_tx_csc->tx_csc_option = DMA2D_CSC_TX_YUV422_TO_RGB888_709;
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} else {
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return false;
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}
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out_tx_csc->pre_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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out_tx_csc->post_scramble = DMA2D_SCRAMBLE_ORDER_BYTE2_1_0;
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return true;
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}
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return false;
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}
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static inline bool needs_tx_csc(const dma2d_csc_config_t *tx_csc)
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{
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return tx_csc->tx_csc_option != DMA2D_CSC_TX_NONE;
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}
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static esp_err_t sync_if_cacheable(void *addr, size_t size, int flags)
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{
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return esp_cache_get_line_size_by_addr(addr) > 0 ? esp_cache_msync(addr, size, flags) : ESP_OK;
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}
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static size_t get_picture_size_bytes(uint32_t stride, uint32_t height, uint32_t bit_depth)
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{
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return (((size_t)stride * height * bit_depth) + 7) / 8;
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}
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static esp_err_t validate_request(const async_color_convert_request_t *request)
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{
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ESP_RETURN_ON_FALSE(request->src_color_format != 0 && request->dst_color_format != 0,
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ESP_ERR_INVALID_ARG, TAG, "invalid color format");
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ESP_RETURN_ON_FALSE(request->src_buffer && request->dst_buffer, ESP_ERR_INVALID_ARG, TAG, "invalid buffer");
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ESP_RETURN_ON_FALSE(request->copy_width > 0 && request->copy_height > 0, ESP_ERR_INVALID_ARG, TAG, "invalid copy window");
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uint64_t src_x_end = (uint64_t)request->src_x + request->copy_width;
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uint64_t src_y_end = (uint64_t)request->src_y + request->copy_height;
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uint64_t dst_x_end = (uint64_t)request->dst_x + request->copy_width;
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uint64_t dst_y_end = (uint64_t)request->dst_y + request->copy_height;
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ESP_RETURN_ON_FALSE(src_x_end <= request->src_stride, ESP_ERR_INVALID_ARG, TAG, "source window out of width");
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ESP_RETURN_ON_FALSE(src_y_end <= request->src_height, ESP_ERR_INVALID_ARG, TAG, "source window out of height");
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ESP_RETURN_ON_FALSE(dst_x_end <= request->dst_stride, ESP_ERR_INVALID_ARG, TAG, "destination window out of width");
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ESP_RETURN_ON_FALSE(dst_y_end <= request->dst_height, ESP_ERR_INVALID_ARG, TAG, "destination window out of height");
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ESP_RETURN_ON_FALSE(request->src_stride <= DMA2D_LL_DESC_2D_FIELD_MAX &&
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request->src_height <= DMA2D_LL_DESC_2D_FIELD_MAX &&
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request->dst_stride <= DMA2D_LL_DESC_2D_FIELD_MAX &&
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request->dst_height <= DMA2D_LL_DESC_2D_FIELD_MAX,
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ESP_ERR_INVALID_ARG, TAG, "dimension exceeds DMA2D descriptor field limit");
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return ESP_OK;
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}
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static async_color_convert_transaction_t *try_acquire_trans(async_color_convert_dma2d_context_t *ctx)
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{
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async_color_convert_transaction_t *trans = NULL;
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portENTER_CRITICAL(&ctx->spinlock);
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if (!atomic_load(&ctx->deleting)) {
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trans = STAILQ_FIRST(&ctx->idle_queue);
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if (trans) {
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STAILQ_REMOVE_HEAD(&ctx->idle_queue, queue_entry);
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atomic_fetch_sub(&ctx->idle_num, 1);
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}
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}
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portEXIT_CRITICAL(&ctx->spinlock);
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return trans;
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}
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static void recycle_trans(async_color_convert_dma2d_context_t *ctx,
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async_color_convert_transaction_t *trans)
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{
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portENTER_CRITICAL_SAFE(&ctx->spinlock);
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STAILQ_INSERT_TAIL(&ctx->idle_queue, trans, queue_entry);
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atomic_fetch_add(&ctx->idle_num, 1);
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portEXIT_CRITICAL_SAFE(&ctx->spinlock);
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}
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static bool async_color_convert_done_cb(dma2d_channel_handle_t dma2d_chan,
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dma2d_event_data_t *event_data,
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void *user_data)
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{
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bool need_yield = false;
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async_color_convert_transaction_t *trans = (async_color_convert_transaction_t *)user_data;
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async_color_convert_dma2d_context_t *ctx = trans->ctx;
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(void)dma2d_chan;
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(void)event_data;
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if (trans->cb_isr) {
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async_color_convert_event_data_t edata = {};
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need_yield = trans->cb_isr(&ctx->parent, &edata, trans->cb_args);
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}
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trans->cb_isr = NULL;
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trans->cb_args = NULL;
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recycle_trans(ctx, trans);
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return need_yield;
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}
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static bool async_color_convert_on_job_picked(uint32_t channel_num,
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const dma2d_trans_channel_info_t *dma2d_chans,
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void *user_config)
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{
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async_color_convert_transaction_t *trans = (async_color_convert_transaction_t *)user_config;
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dma2d_channel_handle_t tx_chan = NULL;
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dma2d_channel_handle_t rx_chan = NULL;
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for (uint32_t i = 0; i < channel_num; i++) {
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if (dma2d_chans[i].dir == DMA2D_CHANNEL_DIRECTION_TX) {
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tx_chan = dma2d_chans[i].chan;
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} else {
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rx_chan = dma2d_chans[i].chan;
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}
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}
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dma2d_trigger_t trig_periph = {
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.periph = DMA2D_TRIG_PERIPH_M2M,
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.periph_sel_id = SOC_DMA2D_TRIG_PERIPH_M2M_TX,
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};
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dma2d_connect(tx_chan, &trig_periph);
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trig_periph.periph_sel_id = SOC_DMA2D_TRIG_PERIPH_M2M_RX;
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dma2d_connect(rx_chan, &trig_periph);
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async_color_convert_dma2d_context_t *ctx = trans->ctx;
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dma2d_transfer_ability_t transfer_ability = {
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.desc_burst_en = true,
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.data_burst_length = ctx->dma_burst_size,
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.access_ext_mem = true,
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.mb_size = DMA2D_MACRO_BLOCK_SIZE_NONE,
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};
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dma2d_set_transfer_ability(tx_chan, &transfer_ability);
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dma2d_set_transfer_ability(rx_chan, &transfer_ability);
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if (needs_tx_csc(&trans->tx_csc)) {
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dma2d_configure_color_space_conversion(tx_chan, &trans->tx_csc);
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}
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dma2d_rx_event_callbacks_t cbs = {
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.on_recv_eof = async_color_convert_done_cb,
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};
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dma2d_register_rx_event_callbacks(rx_chan, &cbs, trans);
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dma2d_set_desc_addr(rx_chan, (intptr_t)trans->rx_desc);
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dma2d_set_desc_addr(tx_chan, (intptr_t)trans->tx_desc);
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dma2d_start(rx_chan);
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dma2d_start(tx_chan);
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return false;
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}
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static void setup_desc(dma2d_descriptor_t *desc,
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void *buffer,
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uint32_t pic_w,
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uint32_t pic_h,
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uint32_t win_w,
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uint32_t win_h,
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uint32_t x,
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uint32_t y,
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uint32_t pbyte)
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{
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memset(desc, 0, sizeof(*desc));
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desc->owner = DMA2D_DESCRIPTOR_BUFFER_OWNER_DMA;
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desc->suc_eof = 1;
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desc->dma2d_en = 1;
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desc->ha_length = pic_w;
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desc->va_size = pic_h;
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desc->hb_length = win_w;
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desc->vb_size = win_h;
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desc->x = x;
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desc->y = y;
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desc->pbyte = pbyte;
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desc->mode = DMA2D_DESCRIPTOR_BLOCK_RW_MODE_SINGLE;
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desc->buffer = buffer;
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desc->next = NULL;
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}
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static esp_err_t async_color_convert_dma2d_convert(async_color_convert_context_t *ctx,
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const async_color_convert_request_t *request,
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async_color_convert_isr_cb_t cb_isr,
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void *cb_args)
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{
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esp_err_t ret = ESP_OK;
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ESP_RETURN_ON_FALSE(ctx && request, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_ERROR(validate_request(request), TAG, "invalid request");
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async_color_convert_dma2d_context_t *color_ctx = __containerof(ctx, async_color_convert_dma2d_context_t, parent);
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async_color_convert_transaction_t *trans = try_acquire_trans(color_ctx);
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ESP_RETURN_ON_FALSE(trans, ESP_ERR_INVALID_STATE, TAG, "no free transaction in pool");
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trans->request = *request; // copy request to transaction object
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trans->cb_isr = cb_isr;
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trans->cb_args = cb_args;
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esp_color_fourcc_t src_fourcc = request->src_color_format;
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esp_color_fourcc_t dst_fourcc = request->dst_color_format;
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trans->tx_csc = (dma2d_csc_config_t) {};
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ESP_GOTO_ON_FALSE(try_convert_request_to_dma2d_csc(request, &trans->tx_csc),
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ESP_ERR_INVALID_ARG, recycle_and_out, TAG, "unsupported color conversion mode");
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if (needs_tx_csc(&trans->tx_csc)) {
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trans->dma2d_trans_config.channel_flags = DMA2D_CHANNEL_FUNCTION_FLAG_SIBLING | DMA2D_CHANNEL_FUNCTION_FLAG_TX_CSC;
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} else {
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trans->dma2d_trans_config.channel_flags = DMA2D_CHANNEL_FUNCTION_FLAG_SIBLING;
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}
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setup_desc(trans->tx_desc,
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(void *)request->src_buffer,
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request->src_stride,
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request->src_height,
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request->copy_width,
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request->copy_height,
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request->src_x,
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request->src_y,
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dma2d_desc_pixel_format_to_pbyte_value(src_fourcc));
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setup_desc(trans->rx_desc,
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request->dst_buffer,
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request->dst_stride,
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request->dst_height,
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request->copy_width,
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request->copy_height,
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request->dst_x,
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request->dst_y,
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dma2d_desc_pixel_format_to_pbyte_value(dst_fourcc));
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uint32_t src_bpp = color_hal_pixel_format_fourcc_get_bit_depth(src_fourcc);
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uint32_t dst_bpp = color_hal_pixel_format_fourcc_get_bit_depth(dst_fourcc);
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size_t src_total_size = get_picture_size_bytes(request->src_stride, request->src_height, src_bpp);
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size_t dst_total_size = get_picture_size_bytes(request->dst_stride, request->dst_height, dst_bpp);
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ESP_GOTO_ON_ERROR(sync_if_cacheable((void *)request->src_buffer, src_total_size,
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ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED),
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recycle_and_out, TAG, "source cache sync failed");
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ESP_GOTO_ON_ERROR(sync_if_cacheable(request->dst_buffer, dst_total_size,
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ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE),
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recycle_and_out, TAG, "destination cache sync failed");
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ESP_GOTO_ON_ERROR(sync_if_cacheable(trans->tx_desc, color_ctx->desc_alloc_size,
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ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE),
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recycle_and_out, TAG, "tx descriptor cache sync failed");
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ESP_GOTO_ON_ERROR(sync_if_cacheable(trans->rx_desc, color_ctx->desc_alloc_size,
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ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE),
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recycle_and_out, TAG, "rx descriptor cache sync failed");
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ESP_GOTO_ON_ERROR(dma2d_enqueue(color_ctx->pool,
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&trans->dma2d_trans_config,
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trans->dma2d_trans_placeholder),
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recycle_and_out, TAG, "enqueue dma2d transaction failed");
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return ESP_OK;
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recycle_and_out:
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recycle_trans(color_ctx, trans);
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return ret;
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}
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|
||||
static esp_err_t async_color_convert_dma2d_destroy(async_color_convert_dma2d_context_t *ctx)
|
||||
{
|
||||
if (ctx->pool) {
|
||||
dma2d_release_pool(ctx->pool);
|
||||
}
|
||||
if (ctx->trans_pool) {
|
||||
for (uint32_t i = 0; i < ctx->num_trans_objs; i++) {
|
||||
free(ctx->trans_pool[i].tx_desc);
|
||||
free(ctx->trans_pool[i].rx_desc);
|
||||
free(ctx->trans_pool[i].dma2d_trans_placeholder);
|
||||
}
|
||||
free(ctx->trans_pool);
|
||||
}
|
||||
free(ctx);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t async_color_convert_dma2d_del(async_color_convert_context_t *ctx)
|
||||
{
|
||||
async_color_convert_dma2d_context_t *color_ctx = __containerof(ctx, async_color_convert_dma2d_context_t, parent);
|
||||
bool can_destroy = false;
|
||||
portENTER_CRITICAL(&color_ctx->spinlock);
|
||||
atomic_store(&color_ctx->deleting, true);
|
||||
can_destroy = (atomic_load(&color_ctx->idle_num) == color_ctx->num_trans_objs);
|
||||
if (!can_destroy) {
|
||||
atomic_store(&color_ctx->deleting, false);
|
||||
}
|
||||
portEXIT_CRITICAL(&color_ctx->spinlock);
|
||||
ESP_RETURN_ON_FALSE(can_destroy,
|
||||
ESP_ERR_INVALID_STATE, TAG, "pending transactions exist");
|
||||
return async_color_convert_dma2d_destroy(color_ctx);
|
||||
}
|
||||
|
||||
esp_err_t esp_async_color_convert_install_dma2d(const async_color_convert_config_t *config,
|
||||
async_color_convert_handle_t *ret_hdl)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
ESP_RETURN_ON_FALSE(config && ret_hdl, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
||||
uint32_t trans_queue_len = config->backlog ? config->backlog : DEFAULT_COLOR_CONVERT_BACKLOG;
|
||||
|
||||
async_color_convert_dma2d_context_t *ctx = heap_caps_calloc(1, sizeof(async_color_convert_dma2d_context_t),
|
||||
MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
|
||||
ESP_RETURN_ON_FALSE(ctx, ESP_ERR_NO_MEM, TAG, "no mem for color convert context");
|
||||
|
||||
ctx->trans_pool = heap_caps_calloc(trans_queue_len, sizeof(async_color_convert_transaction_t),
|
||||
MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
|
||||
ESP_GOTO_ON_FALSE(ctx->trans_pool, ESP_ERR_NO_MEM, err, TAG, "no mem for transaction pool");
|
||||
|
||||
esp_cache_get_alignment(MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA, &ctx->desc_alloc_size);
|
||||
if (ctx->desc_alloc_size < sizeof(dma2d_descriptor_t)) {
|
||||
ctx->desc_alloc_size = sizeof(dma2d_descriptor_t);
|
||||
}
|
||||
|
||||
ctx->num_trans_objs = trans_queue_len;
|
||||
ctx->dma_burst_size = config->dma_burst_size ? config->dma_burst_size : 32;
|
||||
portMUX_INITIALIZE(&ctx->spinlock);
|
||||
STAILQ_INIT(&ctx->idle_queue);
|
||||
atomic_init(&ctx->idle_num, trans_queue_len);
|
||||
atomic_init(&ctx->deleting, false);
|
||||
|
||||
dma2d_pool_config_t pool_cfg = {
|
||||
.pool_id = 0,
|
||||
.intr_priority = config->intr_priority,
|
||||
};
|
||||
ESP_GOTO_ON_ERROR(dma2d_acquire_pool(&pool_cfg, &ctx->pool), err, TAG, "acquire dma2d pool failed");
|
||||
|
||||
for (uint32_t i = 0; i < trans_queue_len; i++) {
|
||||
async_color_convert_transaction_t *trans = &ctx->trans_pool[i];
|
||||
trans->ctx = ctx;
|
||||
// one DMA descriptor is enough for one color-conversion job since
|
||||
// the driver will configure the descriptors in single-block mode and won't split the block into multiple tiles
|
||||
trans->tx_desc = heap_caps_aligned_calloc(DMA2D_LL_DESC_ALIGNMENT, 1, ctx->desc_alloc_size,
|
||||
MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
ESP_GOTO_ON_FALSE(trans->tx_desc, ESP_ERR_NO_MEM, err, TAG, "no memory for tx descriptor");
|
||||
trans->rx_desc = heap_caps_aligned_calloc(DMA2D_LL_DESC_ALIGNMENT, 1, ctx->desc_alloc_size,
|
||||
MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
ESP_GOTO_ON_FALSE(trans->rx_desc, ESP_ERR_NO_MEM, err, TAG, "no memory for rx descriptor");
|
||||
trans->dma2d_trans_placeholder = heap_caps_calloc(1, dma2d_get_trans_elm_size(), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
|
||||
ESP_GOTO_ON_FALSE(trans->dma2d_trans_placeholder, ESP_ERR_NO_MEM, err, TAG, "no memory for dma2d transaction placeholder");
|
||||
// dma2d_enqueue requires a long-lived transaction config, so we prepare it here with the common part configured.
|
||||
// The per-request specific part will be filled in on job picked.
|
||||
trans->dma2d_trans_config = (dma2d_trans_config_t) {
|
||||
.tx_channel_num = 1,
|
||||
.rx_channel_num = 1,
|
||||
.channel_flags = DMA2D_CHANNEL_FUNCTION_FLAG_SIBLING,
|
||||
.specified_tx_channel_mask = 0,
|
||||
.specified_rx_channel_mask = 0,
|
||||
.on_job_picked = async_color_convert_on_job_picked,
|
||||
.user_config = trans,
|
||||
};
|
||||
STAILQ_INSERT_TAIL(&ctx->idle_queue, trans, queue_entry);
|
||||
}
|
||||
|
||||
ctx->parent.convert = async_color_convert_dma2d_convert;
|
||||
ctx->parent.del = async_color_convert_dma2d_del;
|
||||
|
||||
*ret_hdl = &ctx->parent;
|
||||
return ESP_OK;
|
||||
|
||||
err:
|
||||
async_color_convert_dma2d_destroy(ctx);
|
||||
return ret;
|
||||
}
|
||||
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "freertos/task.h"
|
||||
#include "esp_check.h"
|
||||
#include "esp_async_color_convert.h"
|
||||
#include "esp_async_color_convert_priv.h"
|
||||
|
||||
ESP_LOG_ATTR_TAG(TAG, "async_color_conv");
|
||||
|
||||
esp_err_t esp_async_color_convert_uninstall(async_color_convert_handle_t conv_hdl)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(conv_hdl, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
||||
return conv_hdl->del(conv_hdl);
|
||||
}
|
||||
|
||||
esp_err_t esp_async_color_convert(async_color_convert_handle_t conv_hdl,
|
||||
const async_color_convert_request_t *request,
|
||||
async_color_convert_isr_cb_t cb_isr,
|
||||
void *cb_args)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(conv_hdl && request, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
||||
return conv_hdl->convert(conv_hdl, request, cb_isr, cb_args);
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
SemaphoreHandle_t done_sem;
|
||||
StaticSemaphore_t done_sem_buffer;
|
||||
} color_convert_blocking_context_t;
|
||||
|
||||
static bool color_convert_blocking_cb(async_color_convert_handle_t conv_hdl,
|
||||
async_color_convert_event_data_t *edata,
|
||||
void *cb_args)
|
||||
{
|
||||
BaseType_t high_task_woken = pdFALSE;
|
||||
color_convert_blocking_context_t *ctx = (color_convert_blocking_context_t *)cb_args;
|
||||
(void)conv_hdl;
|
||||
(void)edata;
|
||||
xSemaphoreGiveFromISR(ctx->done_sem, &high_task_woken);
|
||||
return (high_task_woken == pdTRUE);
|
||||
}
|
||||
|
||||
esp_err_t esp_color_convert_blocking(async_color_convert_handle_t conv_hdl,
|
||||
const async_color_convert_request_t *request,
|
||||
int32_t timeout_ms)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(conv_hdl && request, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
||||
ESP_RETURN_ON_FALSE(!xPortInIsrContext(), ESP_ERR_INVALID_STATE, TAG, "called from ISR context is not allowed");
|
||||
ESP_RETURN_ON_FALSE(timeout_ms == -1, ESP_ERR_INVALID_ARG, TAG, "only timeout -1 is supported");
|
||||
|
||||
color_convert_blocking_context_t ctx = {};
|
||||
ctx.done_sem = xSemaphoreCreateBinaryStatic(&ctx.done_sem_buffer);
|
||||
|
||||
ESP_RETURN_ON_ERROR(esp_async_color_convert(conv_hdl, request, color_convert_blocking_cb, &ctx), TAG, "fail to start async color conversion");
|
||||
// Wait for the conversion to complete
|
||||
xSemaphoreTake(ctx.done_sem, portMAX_DELAY);
|
||||
return ESP_OK;
|
||||
}
|
||||
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "esp_private/dma2d.h"
|
||||
#include "esp_async_color_convert.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DEFAULT_COLOR_CONVERT_BACKLOG 8
|
||||
|
||||
typedef struct async_color_convert_context_t async_color_convert_context_t;
|
||||
|
||||
struct async_color_convert_context_t {
|
||||
esp_err_t (*convert)(async_color_convert_context_t *ctx,
|
||||
const async_color_convert_request_t *request,
|
||||
async_color_convert_isr_cb_t cb_isr,
|
||||
void *cb_args);
|
||||
esp_err_t (*del)(async_color_convert_context_t *ctx);
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user