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https://github.com/espressif/esp-idf.git
synced 2026-10-03 03:31:41 +03:00
refactor(esp_security): Introduce dedicated APIs for crypto clock configuration
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,7 +13,7 @@
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#include "esp_hmac.h"
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#include "esp_log.h"
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#include "esp_crypto_lock.h"
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#include "esp_private/esp_crypto_lock_internal.h"
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#include "esp_crypto_periph_clk.h"
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#include "soc/hwcrypto_reg.h"
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#include "soc/system_reg.h"
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@@ -71,20 +71,11 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
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esp_crypto_hmac_lock_acquire();
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// We also enable SHA and DS here. SHA is used by HMAC, DS will otherwise hold SHA in reset state.
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(true);
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hmac_ll_reset_register();
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}
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esp_crypto_hmac_enable_periph_clk(true);
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(true);
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sha_ll_reset_register();
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}
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esp_crypto_sha_enable_periph_clk(true);
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DS_RCC_ATOMIC() {
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ds_ll_enable_bus_clock(true);
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ds_ll_reset_register();
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}
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esp_crypto_ds_enable_periph_clk(true);
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hmac_hal_start();
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@@ -146,17 +137,11 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
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// Read back result (bit swapped)
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hmac_hal_read_result_256(hmac);
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DS_RCC_ATOMIC() {
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ds_ll_enable_bus_clock(false);
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}
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esp_crypto_ds_enable_periph_clk(false);
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(false);
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}
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esp_crypto_sha_enable_periph_clk(false);
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(false);
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}
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esp_crypto_hmac_enable_periph_clk(false);
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esp_crypto_hmac_lock_release();
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@@ -195,9 +180,7 @@ esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token)
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ESP_LOGD(TAG, "HMAC computation in downstream mode is completed.");
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(false);
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}
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esp_crypto_hmac_enable_periph_clk(false);
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esp_crypto_hmac_lock_release();
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@@ -208,15 +191,11 @@ esp_err_t esp_hmac_jtag_disable()
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{
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esp_crypto_hmac_lock_acquire();
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(true);
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}
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esp_crypto_hmac_enable_periph_clk(true);
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REG_WRITE(HMAC_SET_INVALIDATE_JTAG_REG, 1);
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(false);
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}
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esp_crypto_hmac_enable_periph_clk(false);
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esp_crypto_hmac_lock_release();
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