fix(mmap): fixed some API read wrong data via mmap when flash being erased/written while XIP on PSRAM

Before:

The cache won't be disabled when XIP on psram. But during flash
erasing/programming, read data will be courrupt.

When XIP in psram is enabled, the image is not mapped to the cache so
usually there will be no flash access. The only way to read from flash
is via the driver or use mmap. The driver has protection during erasing,
while th mmap region not.

Now:

Mmap APIs provide a flag to make mmap->unmap region mutually exclusive
to flash erase/programming when XIP from psram. SPI Flash write APIs
will benefit from this. When the flag is used, no concurrent access to
mapped region will happen while writing; otherwise the cache will be
disable to avoid data corruption.

Most ESP-IDF APIs calls mmap with this flag. As for users calling
mmap-like APIs directly, they can choose whether to enable this by a
flag.

Closes https://github.com/espressif/esp-idf/issues/14897
This commit is contained in:
Xiao Xufeng
2026-07-15 18:57:08 +08:00
committed by Michael (XIAO Xufeng)
parent 39a219331c
commit 3e8389cc31
73 changed files with 1678 additions and 487 deletions
@@ -7,6 +7,7 @@ from pathlib import Path
import pytest
from pytest_embedded_idf.utils import idf_parametrize
from pytest_embedded_idf.utils import soc_filtered_targets
PANIC_BASE_APP = Path(__file__).resolve().parent.parent / 'panic_base'
sys.path.insert(0, str(PANIC_BASE_APP))
@@ -78,30 +79,17 @@ def test_task_wdt_cpu1(dut: PanicTestDut, config: str, test_func_name: str) -> N
panic_tests.test_task_wdt_cpu1(dut, config, test_func_name)
@pytest.mark.parametrize(
'app_path, config, target',
[
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_heap_esp32', 'esp32', marks=(pytest.mark.psram,)),
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_heap_esp32s2', 'esp32s2', marks=(pytest.mark.generic,)),
pytest.param(
COREDUMP_APP, 'coredump_flash_extram_stack_heap_esp32s3', 'esp32s3', marks=(pytest.mark.quad_psram,)
),
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_bss_esp32', 'esp32', marks=(pytest.mark.psram,)),
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_bss_esp32s2', 'esp32s2', marks=(pytest.mark.generic,)),
pytest.param(
COREDUMP_APP, 'coredump_flash_extram_stack_bss_esp32s3', 'esp32s3', marks=(pytest.mark.quad_psram,)
),
],
indirect=True,
)
def test_panic_extram_stack(dut: PanicTestDut, config: str) -> None:
def _test_panic_extram_stack_impl(dut: PanicTestDut, config: str) -> None:
if 'heap' in config:
dut.run_test_func('test_panic_extram_stack_heap')
else:
dut.run_test_func('test_panic_extram_stack_bss')
dut.expect_none('Allocated stack is not in external RAM')
dut.expect_none('Guru Meditation')
dut.expect_backtrace()
if dut.is_xtensa:
dut.expect_backtrace()
else:
dut.expect_stack_dump()
dut.expect_elf_sha256()
if dut.target == 'esp32':
@@ -112,13 +100,70 @@ def test_panic_extram_stack(dut: PanicTestDut, config: str) -> None:
coredump_pattern = re.compile(
'.coredump.tasks.data (0x3[fF][5-9a-fA-F][0-7][0-9a-fA-F]{4}) (0x[a-fA-F0-9]+) RW'
)
else:
elif dut.target == 'esp32s3':
# ESP32-S3 External data memory range [0x3c000000-0x3e000000)
coredump_pattern = re.compile('.coredump.tasks.data (0x3[c-dC-D][0-9a-fA-F]{6}) (0x[a-fA-F0-9]+) RW')
else:
# RISC-V targets (esp32c5, esp32c61, etc.) External data memory range [0x42000000-0x44000000)
coredump_pattern = re.compile('.coredump.tasks.data (0x4[2-3][0-9a-fA-F]{6}) (0x[a-fA-F0-9]+) RW')
common_test(dut, config, expected_backtrace=None, expected_coredump=[coredump_pattern])
def get_psram_marker(target: str) -> pytest.mark:
if target == 'esp32':
return pytest.mark.psram
elif target == 'esp32s3':
return pytest.mark.quad_psram
return pytest.mark.generic
@pytest.mark.parametrize(
'app_path, config, target',
[
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_heap', target, marks=(get_psram_marker(target),))
for target in soc_filtered_targets('SOC_SPIRAM_SUPPORTED == 1')
],
indirect=True,
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4', 'esp32s31'], reason='TODO: IDF-15623')
@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='IDF-12308')
def test_panic_extram_stack_heap_psram(dut: PanicTestDut, config: str) -> None:
_test_panic_extram_stack_impl(dut, config)
@pytest.mark.parametrize(
'app_path, config, target',
[
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_bss', target, marks=(get_psram_marker(target),))
for target in soc_filtered_targets('SOC_SPIRAM_SUPPORTED == 1')
],
indirect=True,
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4', 'esp32s31'], reason='TODO: IDF-15623')
@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='IDF-12308')
def test_panic_extram_stack_heap_bss(dut: PanicTestDut, config: str) -> None:
_test_panic_extram_stack_impl(dut, config)
@pytest.mark.parametrize(
'app_path, config, target',
[
pytest.param(COREDUMP_APP, 'coredump_flash_extram_stack_bss_xip', target, marks=(get_psram_marker(target),))
for target in soc_filtered_targets('SOC_SPIRAM_XIP_SUPPORTED == 1')
],
indirect=True,
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4', 'esp32s31'], reason='TODO: IDF-15623')
@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='IDF-12308')
def test_panic_extram_stack_heap_bss_xip(dut: PanicTestDut, config: str) -> None:
_test_panic_extram_stack_impl(dut, config)
@pytest.mark.generic
@pytest.mark.parametrize('app_path, config', CONFIGS, indirect=True)
@idf_parametrize('target', COREDUMP_TARGETS_ALL, indirect=['target'])
@@ -1,4 +1,3 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
@@ -1,11 +0,0 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
CONFIG_SPIRAM=y
CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
CONFIG_ESP_COREDUMP_CAPTURE_DRAM=y
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_capture_dram.csv"
@@ -1,8 +1,8 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y
CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
@@ -1,4 +1,3 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
@@ -1,7 +0,0 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
CONFIG_SPIRAM=y
CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
@@ -1,7 +0,0 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
# We need to have the coredump info log
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
CONFIG_SPIRAM=y
CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y