feat(esp_riscv_trace): add ESP32-S31 support

ESP32-S31 uses the same trace encoder IP as ESP32-P4. Of the E-Trace v2.0
parameters the two targets report, only privilege_width_p differs (1 on P4,
2 on S31), and it affects both the sync packet layout and the filter's
privilege selector.

- Add the SOC_RISCV_TRACE_* caps for ESP32-S31 along with the esp32s31 LL, and
  declare TRACE0/TRACE1 in the target's trace_struct.h.
- Carry privilege_width_p as SOC_RISCV_TRACE_PRIV_WIDTH so the sync packet
  decoder can locate the address field, which starts one bit later on targets
  that implement supervisor mode.
- Use the RISC-V architectural privilege encoding (0 user, 1 supervisor,
  3 machine) in the public filter enum so the values do not change per target,
  and let each LL narrow them to its own register field.
- Add riscv_trace_ll_priv_is_supported() per target, so a privilege level the
  selector cannot represent is rejected with ESP_ERR_NOT_SUPPORTED rather than
  being silently narrowed to a different level. It lives next to the narrowing
  code so the two cannot drift apart.
- Fix trace buffer allocation on targets whose internal RAM is not reached
  through a cache. esp_cache_get_alignment() reports 0 there, which underflowed
  the size check and failed every allocation. Align base and size to the larger
  of the reported cache line and the encoder's 4-byte write granularity.

components/esp_riscv_trace/include/esp_riscv_trace.h

@@ -83,10 +83,15 @@ typedef enum {
     ESP_RISCV_TRACE_FILTER_MODE_RANGE   = 3, /*!< Start when P matches, continue until S matches */
 } esp_riscv_trace_filter_mode_t;
 
-/** @brief Privilege level selected by the privilege qualifier. */
+/**
+ * @brief Privilege level selected by the privilege qualifier.
+ *
+ * Values are the RISC-V architectural privilege encoding, so they stay the same on every target.
+ */
 typedef enum {
-    ESP_RISCV_TRACE_FILTER_PRIV_USER    = 0, /*!< User mode */
-    ESP_RISCV_TRACE_FILTER_PRIV_MACHINE = 1, /*!< Machine mode */
+    ESP_RISCV_TRACE_FILTER_PRIV_USER       = 0, /*!< User mode */
+    ESP_RISCV_TRACE_FILTER_PRIV_SUPERVISOR = 1, /*!< Supervisor mode; needs SOC_RISCV_TRACE_PRIV_WIDTH >= 2 */
+    ESP_RISCV_TRACE_FILTER_PRIV_MACHINE    = 3, /*!< Machine mode */
 } esp_riscv_trace_filter_priv_t;
 
 /** @brief One filter comparator. */