mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 03:00:34 +03:00
fix(mmap): fixed some API read wrong data via mmap when flash being erased/written while XIP on PSRAM
Before: The cache won't be disabled when XIP on psram. But during flash erasing/programming, read data will be courrupt. When XIP in psram is enabled, the image is not mapped to the cache so usually there will be no flash access. The only way to read from flash is via the driver or use mmap. The driver has protection during erasing, while th mmap region not. Now: Mmap APIs provide a flag to make mmap->unmap region mutually exclusive to flash erase/programming when XIP from psram. SPI Flash write APIs will benefit from this. When the flag is used, no concurrent access to mapped region will happen while writing; otherwise the cache will be disable to avoid data corruption. Most ESP-IDF APIs calls mmap with this flag. As for users calling mmap-like APIs directly, they can choose whether to enable this by a flag. Closes https://github.com/espressif/esp-idf/issues/14897
This commit is contained in:
committed by
Michael (XIAO Xufeng)
parent
fd0b33dfda
commit
3d76ced5bb
@@ -1,5 +1,5 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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# Introduction
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@@ -12,6 +12,7 @@ from typing import Union
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import pexpect
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import pytest
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from pytest_embedded_idf.utils import idf_parametrize
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from pytest_embedded_idf.utils import soc_filtered_targets
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from test_panic_util import PanicTestDut
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TARGETS_XTENSA_SINGLE_CORE = ['esp32s2']
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@@ -248,26 +249,17 @@ def test_task_wdt_cpu1(dut: PanicTestDut, config: str, test_func_name: str) -> N
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common_test(dut, config, expected_backtrace=expected_backtrace, expected_coredump=[coredump_pattern])
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@idf_parametrize(
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'config,target,markers',
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[
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('coredump_flash_extram_stack_heap_esp32', 'esp32', (pytest.mark.psram,)),
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('coredump_flash_extram_stack_heap_esp32s2', 'esp32s2', (pytest.mark.generic,)),
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('coredump_flash_extram_stack_heap_esp32s3', 'esp32s3', (pytest.mark.quad_psram,)),
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('coredump_flash_extram_stack_bss_esp32', 'esp32', (pytest.mark.psram,)),
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('coredump_flash_extram_stack_bss_esp32s2', 'esp32s2', (pytest.mark.generic,)),
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('coredump_flash_extram_stack_bss_esp32s3', 'esp32s3', (pytest.mark.quad_psram,)),
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],
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indirect=['config', 'target'],
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)
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def test_panic_extram_stack(dut: PanicTestDut, config: str) -> None:
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def _test_panic_extram_stack_impl(dut: PanicTestDut, config: str) -> None:
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if 'heap' in config:
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dut.run_test_func('test_panic_extram_stack_heap')
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else:
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dut.run_test_func('test_panic_extram_stack_bss')
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dut.expect_none('Allocated stack is not in external RAM')
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dut.expect_none('Guru Meditation')
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dut.expect_backtrace()
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if dut.is_xtensa:
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dut.expect_backtrace()
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else:
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dut.expect_stack_dump()
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dut.expect_elf_sha256()
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if dut.target == 'esp32':
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@@ -278,13 +270,67 @@ def test_panic_extram_stack(dut: PanicTestDut, config: str) -> None:
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coredump_pattern = re.compile(
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'.coredump.tasks.data (0x3[fF][5-9a-fA-F][0-7][0-9a-fA-F]{4}) (0x[a-fA-F0-9]+) RW'
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)
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else:
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elif dut.target == 'esp32s3':
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# ESP32-S3 External data memory range [0x3c000000-0x3e000000)
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coredump_pattern = re.compile('.coredump.tasks.data (0x3[c-dC-D][0-9a-fA-F]{6}) (0x[a-fA-F0-9]+) RW')
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else:
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# RISC-V targets (esp32c5, esp32c61, etc.) External data memory range [0x42000000-0x44000000)
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coredump_pattern = re.compile('.coredump.tasks.data (0x4[2-3][0-9a-fA-F]{6}) (0x[a-fA-F0-9]+) RW')
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common_test(dut, config, expected_backtrace=None, expected_coredump=[coredump_pattern])
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def get_psram_marker(target: str) -> pytest.MarkDecorator:
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if target == 'esp32':
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return pytest.mark.psram
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elif target == 'esp32s3':
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return pytest.mark.quad_psram
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return pytest.mark.generic
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@idf_parametrize(
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'config,target,markers',
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[
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('coredump_flash_extram_stack_heap', target, (get_psram_marker(target),))
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for target in soc_filtered_targets('SOC_SPIRAM_SUPPORTED == 1')
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],
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indirect=['config', 'target'],
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)
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
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@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4'], reason='TODO: IDF-15623')
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def test_panic_extram_stack_heap_psram(dut: PanicTestDut, config: str) -> None:
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_test_panic_extram_stack_impl(dut, config)
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@idf_parametrize(
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'config,target,markers',
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[
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('coredump_flash_extram_stack_bss', target, (get_psram_marker(target),))
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for target in soc_filtered_targets('SOC_SPIRAM_SUPPORTED == 1')
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],
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indirect=['config', 'target'],
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)
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
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@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4'], reason='TODO: IDF-15623')
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def test_panic_extram_stack_heap_bss(dut: PanicTestDut, config: str) -> None:
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_test_panic_extram_stack_impl(dut, config)
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@idf_parametrize(
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'config,target,markers',
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[
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('coredump_flash_extram_stack_bss_xip', target, (get_psram_marker(target),))
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for target in soc_filtered_targets('SOC_SPIRAM_XIP_SUPPORTED == 1')
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],
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indirect=['config', 'target'],
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)
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration')
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@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61', 'esp32p4'], reason='TODO: IDF-15623')
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def test_panic_extram_stack_heap_bss_xip(dut: PanicTestDut, config: str) -> None:
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_test_panic_extram_stack_impl(dut, config)
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@pytest.mark.generic
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@idf_parametrize('config, target', CONFIGS, indirect=['config', 'target'])
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def test_int_wdt(dut: PanicTestDut, target: str, config: str, test_func_name: str) -> None:
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-1
@@ -1,4 +1,3 @@
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CONFIG_IDF_TARGET="esp32"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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@@ -1,13 +0,0 @@
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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# We need to have the coredump info log
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CONFIG_LOG_DEFAULT_LEVEL_INFO=y
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CONFIG_SPIRAM=y
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CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
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CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
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CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
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CONFIG_ESP_COREDUMP_CAPTURE_DRAM=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_capture_dram.csv"
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+1
-1
@@ -1,10 +1,10 @@
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CONFIG_IDF_TARGET="esp32s2"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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# We need to have the coredump info log
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CONFIG_LOG_DEFAULT_LEVEL_INFO=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
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CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
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CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
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-1
@@ -1,4 +1,3 @@
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CONFIG_IDF_TARGET="esp32"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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@@ -1,9 +0,0 @@
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CONFIG_IDF_TARGET="esp32s2"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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# We need to have the coredump info log
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CONFIG_LOG_DEFAULT_LEVEL_INFO=y
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CONFIG_SPIRAM=y
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CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
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CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
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@@ -1,9 +0,0 @@
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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# We need to have the coredump info log
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CONFIG_LOG_DEFAULT_LEVEL_INFO=y
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CONFIG_SPIRAM=y
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CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
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CONFIG_ESP_COREDUMP_USE_STACK_SIZE=y
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