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feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4

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This commit is contained in:
yanzihan@espressif.com
2025-07-18 09:54:31 +08:00
parent b43b2001a2
commit 3d3731965c
21 changed files with 395 additions and 31 deletions
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components/esp_system/port/soc/esp32p4/clk.c
+3
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@@ -380,7 +380,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_REF_50M_CLK_EN);
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_REF_25M_CLK_EN);
// 240M CLK is for Key Management use, should not be gated
#if !CONFIG_ESP_ENABLE_PVT
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_160M_CLK_EN);
#endif
// 160M CLK is for PVT use, should not be gated
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_120M_CLK_EN);
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_80M_CLK_EN);
REG_CLR_BIT(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_20M_CLK_EN);