Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

feat(efuse): Adds efuse flash fields for esp32c2

Browse Source
This commit is contained in:
Konstantin Kondrashov
2026-03-18 19:40:14 +08:00
committed by BOT
parent d13bbd4b2b
commit 3d2b3b059b
5 changed files with 115 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/efuse/esp32c2/esp_efuse_table.c
+56 -2
View File
@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -9,7 +9,7 @@
#include <assert.h> #include <assert.h>
#include "esp_efuse_table.h" #include "esp_efuse_table.h"
// md5_digest_table 439495cbc35dc68d7566e05ac3dbb248 // md5_digest_table 066deaa9a981a1c5cd33c78803ad1d45
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -187,6 +187,18 @@ static const esp_efuse_desc_t WR_DIS_ADC_CALIBRATION_3[] = {
{EFUSE_BLK0, 6, 1}, // [] wr_dis of ADC_CALIBRATION_3, {EFUSE_BLK0, 6, 1}, // [] wr_dis of ADC_CALIBRATION_3,
}; };
static const esp_efuse_desc_t WR_DIS_FLASH_VENDOR[] = {
{EFUSE_BLK0, 6, 1}, // [] wr_dis of FLASH_VENDOR,
};
static const esp_efuse_desc_t WR_DIS_FLASH_TEMP[] = {
{EFUSE_BLK0, 6, 1}, // [] wr_dis of FLASH_TEMP,
};
static const esp_efuse_desc_t WR_DIS_FLASH_CAP[] = {
{EFUSE_BLK0, 6, 1}, // [] wr_dis of FLASH_CAP,
};
static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = { static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = {
{EFUSE_BLK0, 7, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0, {EFUSE_BLK0, 7, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
}; };
@@ -380,6 +392,18 @@ static const esp_efuse_desc_t ADC_CALIBRATION_3[] = {
{EFUSE_BLK2, 192, 11}, // [] Store the bit [86:96] of ADC calibration data, {EFUSE_BLK2, 192, 11}, // [] Store the bit [86:96] of ADC calibration data,
}; };
static const esp_efuse_desc_t FLASH_VENDOR[] = {
{EFUSE_BLK2, 248, 3}, // [] Flash vendor,
};
static const esp_efuse_desc_t FLASH_TEMP[] = {
{EFUSE_BLK2, 251, 2}, // [] Flash temperature rating,
};
static const esp_efuse_desc_t FLASH_CAP[] = {
{EFUSE_BLK2, 253, 3}, // [] Flash capacity,
};
static const esp_efuse_desc_t KEY0[] = { static const esp_efuse_desc_t KEY0[] = {
{EFUSE_BLK3, 0, 256}, // [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption, {EFUSE_BLK3, 0, 256}, // [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption,
}; };
@@ -615,6 +639,21 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC_CALIBRATION_3[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[] = {
&WR_DIS_FLASH_VENDOR[0], // [] wr_dis of FLASH_VENDOR
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[] = {
&WR_DIS_FLASH_TEMP[0], // [] wr_dis of FLASH_TEMP
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[] = {
&WR_DIS_FLASH_CAP[0], // [] wr_dis of FLASH_CAP
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = { const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = {
&WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 &WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
NULL NULL
@@ -855,6 +894,21 @@ const esp_efuse_desc_t* ESP_EFUSE_ADC_CALIBRATION_3[] = {
NULL NULL
}; };
const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
&FLASH_VENDOR[0], // [] Flash vendor
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[] = {
&FLASH_TEMP[0], // [] Flash temperature rating
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
&FLASH_CAP[0], // [] Flash capacity
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = { const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
&KEY0[0], // [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption &KEY0[0], // [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
NULL NULL
components/efuse/esp32c2/esp_efuse_table.csv
+7 -1
View File
@@ -9,7 +9,7 @@
# this will generate new source files, next rebuild all the sources. # this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! # # !!!!!!!!!!! #
# This file was generated by regtools.py based on the efuses.yaml file with the version: 897499b0349a608b895d467abbcf006b # This file was generated by regtools.py based on the efuses.yaml file with the version: 58a0463c13130569739af12cde638a4a
WR_DIS, EFUSE_BLK0, 0, 8, [] Disable programming of individual eFuses WR_DIS, EFUSE_BLK0, 0, 8, [] Disable programming of individual eFuses
WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
@@ -54,6 +54,9 @@ WR_DIS.RTC_LDO_SLP_DBIAS31, EFUSE_BLK0, 6, 1, [] wr_dis
WR_DIS.RTC_LDO_ACT_DBIAS31, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS31 WR_DIS.RTC_LDO_ACT_DBIAS31, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS31
WR_DIS.RTC_LDO_ACT_DBIAS13, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS13 WR_DIS.RTC_LDO_ACT_DBIAS13, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS13
WR_DIS.ADC_CALIBRATION_3, EFUSE_BLK0, 6, 1, [] wr_dis of ADC_CALIBRATION_3 WR_DIS.ADC_CALIBRATION_3, EFUSE_BLK0, 6, 1, [] wr_dis of ADC_CALIBRATION_3
WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 6, 1, [] wr_dis of FLASH_VENDOR
WR_DIS.FLASH_TEMP, EFUSE_BLK0, 6, 1, [] wr_dis of FLASH_TEMP
WR_DIS.FLASH_CAP, EFUSE_BLK0, 6, 1, [] wr_dis of FLASH_CAP
WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 7, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 7, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
RD_DIS, EFUSE_BLK0, 32, 2, [] Disable reading from BlOCK3 RD_DIS, EFUSE_BLK0, 32, 2, [] Disable reading from BlOCK3
RD_DIS.KEY0, EFUSE_BLK0, 32, 2, [] Read protection for EFUSE_BLK3. KEY0 RD_DIS.KEY0, EFUSE_BLK0, 32, 2, [] Read protection for EFUSE_BLK3. KEY0
@@ -106,6 +109,9 @@ RTC_LDO_SLP_DBIAS31, EFUSE_BLK2, 151, 6, [] BLOCK2
RTC_LDO_ACT_DBIAS31, EFUSE_BLK2, 157, 6, [] BLOCK2 DIG_LDO_ACT_DBIAS31 RTC_LDO_ACT_DBIAS31, EFUSE_BLK2, 157, 6, [] BLOCK2 DIG_LDO_ACT_DBIAS31
RTC_LDO_ACT_DBIAS13, EFUSE_BLK2, 163, 8, [] BLOCK2 DIG_LDO_ACT_DBIAS13 RTC_LDO_ACT_DBIAS13, EFUSE_BLK2, 163, 8, [] BLOCK2 DIG_LDO_ACT_DBIAS13
ADC_CALIBRATION_3, EFUSE_BLK2, 192, 11, [] Store the bit [86:96] of ADC calibration data ADC_CALIBRATION_3, EFUSE_BLK2, 192, 11, [] Store the bit [86:96] of ADC calibration data
FLASH_VENDOR, EFUSE_BLK2, 248, 3, [] Flash vendor
FLASH_TEMP, EFUSE_BLK2, 251, 2, [] Flash temperature rating
FLASH_CAP, EFUSE_BLK2, 253, 3, [] Flash capacity
KEY0, EFUSE_BLK3, 0, 256, [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption KEY0, EFUSE_BLK3, 0, 256, [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
KEY0.FE_256BIT, EFUSE_BLK3, 0, 256, [] 256bit FE key KEY0.FE_256BIT, EFUSE_BLK3, 0, 256, [] 256bit FE key
KEY0.FE_128BIT, EFUSE_BLK3, 0, 128, [] 128bit FE key KEY0.FE_128BIT, EFUSE_BLK3, 0, 128, [] 128bit FE key
Can't render this file because it contains an unexpected character in line 8 and column 53.
components/efuse/esp32c2/include/esp_efuse_table.h
+8 -2
View File
@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -10,7 +10,7 @@ extern "C" {
#include "esp_efuse.h" #include "esp_efuse.h"
// md5_digest_table 439495cbc35dc68d7566e05ac3dbb248 // md5_digest_table 066deaa9a981a1c5cd33c78803ad1d45
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file // If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -64,6 +64,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RTC_LDO_SLP_DBIAS31[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RTC_LDO_ACT_DBIAS31[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RTC_LDO_ACT_DBIAS31[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RTC_LDO_ACT_DBIAS13[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RTC_LDO_ACT_DBIAS13[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC_CALIBRATION_3[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC_CALIBRATION_3[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[]; extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[];
#define ESP_EFUSE_WR_DIS_KEY0 ESP_EFUSE_WR_DIS_BLOCK_KEY0 #define ESP_EFUSE_WR_DIS_KEY0 ESP_EFUSE_WR_DIS_BLOCK_KEY0
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[]; extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[];
@@ -116,6 +119,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_RTC_LDO_SLP_DBIAS31[];
extern const esp_efuse_desc_t* ESP_EFUSE_RTC_LDO_ACT_DBIAS31[]; extern const esp_efuse_desc_t* ESP_EFUSE_RTC_LDO_ACT_DBIAS31[];
extern const esp_efuse_desc_t* ESP_EFUSE_RTC_LDO_ACT_DBIAS13[]; extern const esp_efuse_desc_t* ESP_EFUSE_RTC_LDO_ACT_DBIAS13[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC_CALIBRATION_3[]; extern const esp_efuse_desc_t* ESP_EFUSE_ADC_CALIBRATION_3[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[];
#define ESP_EFUSE_BLOCK_KEY0 ESP_EFUSE_KEY0 #define ESP_EFUSE_BLOCK_KEY0 ESP_EFUSE_KEY0
extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_256BIT[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_256BIT[];
components/soc/esp32c2/register/soc/efuse_reg.h
+28 -7
View File
@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -596,13 +596,34 @@ extern "C" {
* Register 7 of BLOCK2. * Register 7 of BLOCK2.
*/ */
#define EFUSE_RD_BLK2_DATA7_REG (DR_REG_EFUSE_BASE + 0x5c) #define EFUSE_RD_BLK2_DATA7_REG (DR_REG_EFUSE_BASE + 0x5c)
/** EFUSE_BLK2_RESERVED_DATA_1 : RO; bitpos: [31:0]; default: 0; /** EFUSE_RESERVED_2_224 : R; bitpos: [23:0]; default: 0;
* Store the bit [21:52] of block2 reserved data. * reserved
*/ */
#define EFUSE_BLK2_RESERVED_DATA_1 0xFFFFFFFFU #define EFUSE_RESERVED_2_224 0x00FFFFFFU
#define EFUSE_BLK2_RESERVED_DATA_1_M (EFUSE_BLK2_RESERVED_DATA_1_V << EFUSE_BLK2_RESERVED_DATA_1_S) #define EFUSE_RESERVED_2_224_M (EFUSE_RESERVED_2_224_V << EFUSE_RESERVED_2_224_S)
#define EFUSE_BLK2_RESERVED_DATA_1_V 0xFFFFFFFFU #define EFUSE_RESERVED_2_224_V 0x00FFFFFFU
#define EFUSE_BLK2_RESERVED_DATA_1_S 0 #define EFUSE_RESERVED_2_224_S 0
/** EFUSE_FLASH_VENDOR : R; bitpos: [26:24]; default: 0;
* Flash vendor
*/
#define EFUSE_FLASH_VENDOR 0x00000007U
#define EFUSE_FLASH_VENDOR_M (EFUSE_FLASH_VENDOR_V << EFUSE_FLASH_VENDOR_S)
#define EFUSE_FLASH_VENDOR_V 0x00000007U
#define EFUSE_FLASH_VENDOR_S 24
/** EFUSE_FLASH_TEMP : R; bitpos: [28:27]; default: 0;
* Flash temperature rating
*/
#define EFUSE_FLASH_TEMP 0x00000003U
#define EFUSE_FLASH_TEMP_M (EFUSE_FLASH_TEMP_V << EFUSE_FLASH_TEMP_S)
#define EFUSE_FLASH_TEMP_V 0x00000003U
#define EFUSE_FLASH_TEMP_S 27
/** EFUSE_FLASH_CAP : R; bitpos: [31:29]; default: 0;
* Flash capacity
*/
#define EFUSE_FLASH_CAP 0x00000007U
#define EFUSE_FLASH_CAP_M (EFUSE_FLASH_CAP_V << EFUSE_FLASH_CAP_S)
#define EFUSE_FLASH_CAP_V 0x00000007U
#define EFUSE_FLASH_CAP_S 29
/** EFUSE_RD_BLK3_DATA0_REG register /** EFUSE_RD_BLK3_DATA0_REG register
* Register 0 of BLOCK3. * Register 0 of BLOCK3.
components/soc/esp32c2/register/soc/efuse_struct.h
+16 -4
View File
@@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -493,10 +493,22 @@ typedef union {
*/ */
typedef union { typedef union {
struct { struct {
/** blk2_reserved_data_1 : RO; bitpos: [31:0]; default: 0; /** reserved_2_224 : R; bitpos: [23:0]; default: 0;
* Store the bit [21:52] of block2 reserved data. * reserved
*/ */
uint32_t blk2_reserved_data_1:32; uint32_t reserved_2_224:24;
/** flash_vendor : R; bitpos: [26:24]; default: 0;
* Flash vendor
*/
uint32_t flash_vendor:3;
/** flash_temp : R; bitpos: [28:27]; default: 0;
* Flash temperature rating
*/
uint32_t flash_temp:2;
/** flash_cap : R; bitpos: [31:29]; default: 0;
* Flash capacity
*/
uint32_t flash_cap:3;
}; };
uint32_t val; uint32_t val;
} efuse_rd_blk2_data7_reg_t; } efuse_rd_blk2_data7_reg_t;