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Chip/support esp32c61 v5.5
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@@ -240,7 +240,7 @@ esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t
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ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed");
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#endif // CONFIG_PM_ENABLE
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esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true);
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ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
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uint32_t real_div;
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#if SOC_RMT_CHANNEL_CLK_INDEPENDENT
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uint32_t periph_src_clk_hz = 0;
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