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Merge branch 'refactor/mspi_ll' into 'master'

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mspi: rename mspi_timing_tuning_ll.h to mspi_ll.h

Closes IDF-11918

See merge request espressif/esp-idf!36039
This commit is contained in:
Armando (Dou Yiwen)
2025-01-08 16:29:28 +08:00
parent b92e993d56 4c869d1f23
commit 3aba0ff704
39 changed files with 762 additions and 531 deletions
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components/soc/esp32h21/include/soc/clk_tree_defs.h
+18 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -244,6 +244,23 @@ typedef enum {
CLKOUT_SIG_INVALID = 0xFF,
} soc_clkout_sig_id_t;
//////////////////////////////////////////////////FLASH///////////////////////////////////////////////////////////////////
/**
* @brief Array initializer for all supported clock sources of FLASH MSPI controller
*/
#define SOC_FLASH_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_PLL_F64M, SOC_MOD_CLK_PLL_F48M}
/**
* @brief FLASH MSPI controller clock source
*/
typedef enum {
FLASH_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
FLASH_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
FLASH_CLK_SRC_PLL_F64M = SOC_MOD_CLK_PLL_F64M, /*!< Select PLL_F64M as the source clock */
FLASH_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_F48M as the source clock */
FLASH_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F64M, /*!< Select PLL_F64M as the default clock choice */
FLASH_CLK_SRC_ROM_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as ROM default clock source */
} soc_periph_flash_clk_src_t;
#ifdef __cplusplus
}
#endif