Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 18:50:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'bugfix/fix_esp32_phy_init_bb_clock_issue' into 'master'

Browse Source 
bugfix(wifi): fix incomplete phy initialization due to absence of bb clocks at...

Closes ESPCS-1007 and ESPCS-997

See merge request espressif/esp-idf!42511
This commit is contained in:
Jiang Jiang Jian
2026-01-08 20:32:04 +08:00
parent 41a714df3a 928136d54e
commit 382dbc04ea
44 changed files with 443 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/hal/esp32s3/include/hal/clk_gate_ll.h
+13
View File
@@ -83,6 +83,7 @@ static inline uint32_t periph_ll_get_clk_en_reg(shared_periph_module_t periph)
case PERIPH_WIFI_MODULE:
case PERIPH_BT_MODULE:
case PERIPH_WIFI_BT_COMMON_MODULE:
return SYSTEM_WIFI_CLK_EN_REG;
case PERIPH_UART2_MODULE:
case PERIPH_LCD_CAM_MODULE:
return SYSTEM_PERIP_CLK_EN1_REG;
@@ -153,6 +154,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif