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feat(isp): added shadow reg settings

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This commit is contained in:
armando
2025-11-14 15:52:44 +08:00
parent ccc59ed681
commit 35f050a97d
10 changed files with 248 additions and 2 deletions
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components/hal/esp32p4/include/hal/isp_ll.h
+226
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@@ -197,6 +197,14 @@ typedef enum {
ISP_LL_PIPELINE_CLK_CTRL_ALWAYS_ON, ///< Always on
} isp_ll_pipeline_clk_ctrl_t;
/**
* @brief Shadow mode
*/
typedef enum {
ISP_SHADOW_MODE_DISABLE,
ISP_SHADOW_MODE_UPDATE_EVERY_VSYNC,
ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC,
} isp_ll_shadow_mode_t;
/*---------------------------------------------------------------
Clock
@@ -1852,6 +1860,224 @@ static inline void isp_ll_demosaic_set_padding_line_tail_valid_end_pixel(isp_dev
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->demosaic_matrix_ctrl, demosaic_tail_pixen_pulse_th, end_pixel);
}
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
/*---------------------------------------------------------------
Shadow
---------------------------------------------------------------*/
/**
* @brief Shadow mode
*
* @param[in] hw Hardware instance address
* @param[in] mode 'isp_ll_shadow_mode_t`
*/
static inline void isp_ll_shadow_set_mode(isp_dev_t *hw, isp_ll_shadow_mode_t mode)
{
hw->shadow_reg_ctrl.shadow_update_sel = mode;
}
/**
* @brief Update BLC shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.blc_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.blc_update = 1;
return true;
}
/**
* @brief Update DPC shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.dpc_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.dpc_update = 1;
return true;
}
/**
* @brief Update BF shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.bf_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.bf_update = 1;
return true;
}
/**
* @brief Update WBG shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.wbg_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.wbg_update = 1;
return true;
}
/**
* @brief Update CCM shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_ccm(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.ccm_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.ccm_update = 1;
return true;
}
/**
* @brief Update Sharpen shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.sharp_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.sharp_update = 1;
return true;
}
/**
* @brief Update Color shadow register
*
* @param[in] hw Hardware instance address
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.color_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.color_update = 1;
return true;
}
#else
static inline void isp_ll_shadow_set_mode(isp_dev_t *hw, isp_ll_shadow_mode_t mode)
{
//for compatibility
}
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_ccm(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw)
{
//for compatibility
return true;
}
#endif
/*---------------------------------------------------------------
Sharpen
---------------------------------------------------------------*/