Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-08-18 06:35:35 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'feature/support_feature_depend_on_rtc_fast_mem_for_esp32c2_backport_v5.0' into 'release/v5.0'

Browse Source 
esp32c2: support feature(rtc time) depend on rtc fast mem(backport v5.0)

See merge request espressif/esp-idf!22224
This commit is contained in:
Jiang Jiang Jian
2023-02-27 15:06:31 +08:00
parent f39c3b286c 99c6be712d
commit 335ad04cba
19 changed files with 162 additions and 152 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
components/esp_system/port/soc/esp32c2/reset_reason.c
View File

@@ -65,16 +65,10 @@ esp_reset_reason_t esp_reset_reason(void)
return s_reset_reason;
}
/* Reset reason hint is stored in RTC_RESET_CAUSE_REG, a.k.a. RTC_CNTL_STORE6_REG,
* a.k.a. RTC_ENTRY_ADDR_REG. It is safe to use this register both for the
* deep sleep wake stub entry address and for reset reason hint, since wake stub
* is only used for deep sleep reset, and in this case the reason provided by
* esp_rom_get_reset_reason is unambiguous.
/* Reset reason hint is stored in RTC_RESET_CAUSE_REG, a.k.a. RTC_CNTL_STORE6_REG.
*
* Same layout is used as for RTC_APB_FREQ_REG (a.k.a. RTC_CNTL_STORE5_REG):
* the value is replicated in low and high half-words. In addition to that,
* MSB is set to 1, which doesn't happen when RTC_CNTL_STORE6_REG contains
* deep sleep wake stub address.
* the value is replicated in low and high half-words.
*/
#define RST_REASON_BIT 0x80000000

3
components/esp_system/test/CMakeLists.txt
View File

@@ -1,7 +1,8 @@
set(requires "unity"
"test_utils"
"driver"
"esp_timer")
"esp_timer"
"nvs_flash")
set(excludes "test_ipc_isr.c"
"test_ipc_isr.S"

86
components/esp_system/test/test_sleep.c
View File

@@ -28,6 +28,8 @@
#include "esp_timer.h"
#include "esp_private/esp_clk.h"
#include "esp_random.h"
#include "nvs_flash.h"
#include "nvs.h"
#define ESP_EXT0_WAKEUP_LEVEL_LOW 0
#define ESP_EXT0_WAKEUP_LEVEL_HIGH 1
@@ -64,8 +66,6 @@ TEST_CASE("enter deep sleep on APP CPU and wake up using timer", "[deepsleep][re
}
#endif
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5131
TEST_CASE("wake up from deep sleep using timer", "[deepsleep][reset=DEEPSLEEP_RESET]")
{
esp_sleep_enable_timer_wakeup(2000000);
@@ -79,7 +79,6 @@ TEST_CASE("light sleep followed by deep sleep", "[deepsleep][reset=DEEPSLEEP_RES
esp_deep_sleep_start();
}
//IDF-5053
TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
{
esp_sleep_enable_timer_wakeup(2000000);
@@ -91,7 +90,6 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
(tv_stop.tv_usec - tv_start.tv_usec) * 1e-3f;
TEST_ASSERT_INT32_WITHIN(500, 2000, (int) dt);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//NOTE: Explained in IDF-1445 | MR !14996
#if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
@@ -232,8 +230,6 @@ TEST_CASE("light sleep and frequency switching", "[deepsleep]")
}
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5131
static void do_deep_sleep(void)
{
esp_sleep_enable_timer_wakeup(100000);
@@ -275,6 +271,7 @@ TEST_CASE_MULTIPLE_STAGES("enter deep sleep after abort", "[deepsleep][reset=abo
check_abort_reset_and_sleep,
check_sleep_reset);
#if SOC_RTC_FAST_MEM_SUPPORTED
static RTC_DATA_ATTR uint32_t s_wake_stub_var;
static RTC_IRAM_ATTR void wake_stub(void)
@@ -300,12 +297,10 @@ static void check_wake_stub(void)
#endif
}
TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEEP_RESET]",
prepare_wake_stub,
check_wake_stub);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#endif // SOC_RTC_FAST_MEM_SUPPORTED
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
@@ -374,9 +369,7 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub from stack in RTC RAM", "[dee
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5131
#if SOC_PM_SUPPORT_EXT_WAKEUP
TEST_CASE("wake up using ext0 (13 high)", "[deepsleep][ignore]")
{
ESP_ERROR_CHECK(rtc_gpio_init(GPIO_NUM_13));
@@ -430,8 +423,7 @@ TEST_CASE("wake up using ext1 when RTC_PERIPH is on (13 low)", "[deepsleep][igno
ESP_ERROR_CHECK(esp_sleep_enable_ext1_wakeup(BIT(GPIO_NUM_13), ESP_EXT1_WAKEUP_ALL_LOW));
esp_deep_sleep_start();
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#endif // SOC_PM_SUPPORT_EXT_WAKEUP
__attribute__((unused)) static float get_time_ms(void)
{
@@ -528,11 +520,30 @@ TEST_CASE("disable source trigger behavior", "[deepsleep]")
#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5131
static RTC_DATA_ATTR struct timeval start;
static void trigger_deepsleep(void)
{
struct timeval start;
// Use NVS instead of RTC mem to store the start time of deep sleep
// Beacuse not all esp chips support RTC mem(such as esp32c2)
// Initialize NVS
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
// NVS partition was truncated and needs to be erased
// Retry nvs_flash_init
ESP_ERROR_CHECK(nvs_flash_erase());
err = nvs_flash_init();
}
ESP_ERROR_CHECK(err);
nvs_handle_t nvs_handle;
err = nvs_open("storage", NVS_READWRITE, &nvs_handle);
if (err != ESP_OK) {
printf("Error (%s) opening NVS handle!\n", esp_err_to_name(err));
} else {
printf("Done\n");
}
printf("Trigger deep sleep. Waiting for 10 sec ...\n");
// Simulate the dispersion of the calibration coefficients at start-up.
@@ -545,6 +556,14 @@ static void trigger_deepsleep(void)
// Save start time. Deep sleep.
gettimeofday(&start, NULL);
ESP_ERROR_CHECK(nvs_set_i32(nvs_handle, "start_sec", start.tv_sec));
ESP_ERROR_CHECK(nvs_set_i32(nvs_handle, "start_usec", start.tv_usec));
ESP_ERROR_CHECK(nvs_commit(nvs_handle));
nvs_close(nvs_handle);
// Deinit NVS to prevent Unity from complaining "The test leaked too much memory"
ESP_ERROR_CHECK(nvs_flash_deinit());
esp_sleep_enable_timer_wakeup(1000);
// In function esp_deep_sleep_start() uses function esp_sync_timekeeping_timers()
// to prevent a negative time after wake up.
@@ -553,11 +572,39 @@ static void trigger_deepsleep(void)
static void check_time_deepsleep(void)
{
struct timeval stop;
struct timeval start, stop;
// Initialize NVS
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
// NVS partition was truncated and needs to be erased
// Retry nvs_flash_init
ESP_ERROR_CHECK(nvs_flash_erase());
err = nvs_flash_init();
}
ESP_ERROR_CHECK(err);
nvs_handle_t nvs_handle;
err = nvs_open("storage", NVS_READWRITE, &nvs_handle);
if (err != ESP_OK) {
printf("Error (%s) opening NVS handle!\n", esp_err_to_name(err));
} else {
printf("Done\n");
}
// Get start time of deep sleep
ESP_ERROR_CHECK(nvs_get_i32(nvs_handle, "start_sec", (int32_t *)&start.tv_sec));
ESP_ERROR_CHECK(nvs_get_i32(nvs_handle, "start_usec", (int32_t *)&start.tv_usec));
nvs_close(nvs_handle);
// Deinit NVS to prevent Unity from complaining "The test leaked too much memory"
ESP_ERROR_CHECK(nvs_flash_deinit());
// Reset must be caused by deep sleep
soc_reset_reason_t reason = esp_rom_get_reset_reason(0);
TEST_ASSERT(reason == RESET_REASON_CORE_DEEP_SLEEP);
gettimeofday(&stop, NULL);
// Time dt_ms must in any case be positive.
gettimeofday(&stop, NULL);
int dt_ms = (stop.tv_sec - start.tv_sec) * 1000 + (stop.tv_usec - start.tv_usec) / 1000;
printf("delta time = %d \n", dt_ms);
TEST_ASSERT_MESSAGE(dt_ms > 0, "Time in deep sleep is negative");
@@ -589,4 +636,3 @@ TEST_CASE("wake up using GPIO (2 or 4 low)", "[deepsleep][ignore]")
esp_deep_sleep_start();
}
#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

4
components/esp_system/test_apps/rtc_8md256/main/test_rtc_8md256.c
View File

@@ -16,9 +16,6 @@
#include "soc/soc_caps.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5131
static const char TAG[] = "rtc_8m";
static void test_deepsleep(bool force_rtc_periph)
@@ -40,7 +37,6 @@ TEST_CASE("Can use 8MD256 as RTC clock source in deepsleep", "[pm]")
{
test_deepsleep(false);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
static void test_lightsleep(bool force_rtc_periph)
{

2
components/esp_system/test_apps/rtc_8md256/pytest_rtc_8md256.py
View File

@@ -19,11 +19,11 @@ def deepsleep_test(dut: Dut, case_name: str) -> None:
dut.expect(r'rst:.*\(%s\)' % reset_reason, timeout=10)
# IDF-5131
@pytest.mark.esp32
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c3
@pytest.mark.esp32c2
@pytest.mark.generic
def test_rtc_8md256_deepsleep(dut: Dut) -> None:
deepsleep_test(dut, '"Can use 8MD256 as RTC clock source in deepsleep"')