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change(esp_hw_support): split the sleep_clock_icg APIs into sleep_clock_icg.c

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This commit is contained in:
hebinglin
2026-07-29 15:23:09 +08:00
parent d6b0a50c5d
commit 33591e16b6
16 changed files with 581 additions and 92 deletions
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components/esp_hw_support/lowpower/CMakeLists.txt
+4
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@@ -40,6 +40,10 @@ if((CONFIG_SOC_PM_SUPPORT_MODEM_PD OR CONFIG_SOC_PM_SUPPORT_TOP_PD) AND CONFIG_S
list(APPEND srcs "port/${target}/sleep_clock.c")
endif()
if(CONFIG_SOC_PM_SUPPORT_PMU_CLK_ICG)
list(APPEND srcs "port/${target}/sleep_clock_icg.c")
endif()
if(CONFIG_SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY)
list(APPEND srcs "port/${target}/sleep_phy.c")
endif()
components/esp_hw_support/lowpower/port/esp32c5/sleep_clock_icg.c
+61
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@@ -0,0 +1,61 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32c6/sleep_clock_icg.c
+70
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@@ -0,0 +1,70 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
#if SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND
/* Starting from C6ECO1 and later versions, when BLE RTC is configured to use
* MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL,the actual slow clock source is the WiFi power clock.
* As all 32 bits of ICG_FUNC are occupied, the ESP_SLEEP_CLOCK_BT_USE_WIFI_PWR_CLK
* has been remapped to PMU_ICG_FUNC_ENA_RETENTION.*/
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_BT_USE_WIFI_PWR_CLK] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_RETENTION);
}
#endif
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32c61/sleep_clock_icg.c
+66
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@@ -0,0 +1,66 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
#if SOC_UART_HP_NUM > 2
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART2] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART2);
}
#endif
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32h2/sleep_clock_icg.c
+61
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@@ -0,0 +1,61 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32h21/sleep_clock_icg.c
+61
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@@ -0,0 +1,61 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32h4/sleep_clock_icg.c
+61
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@@ -0,0 +1,61 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32p4/sleep_clock_icg.c
+88
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@@ -0,0 +1,88 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
ESP_LOG_ATTR_TAG(TAG, "sleep_clock_icg");
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint32_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint32_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
#if SOC_UART_HP_NUM > 2
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART2] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART2);
}
#endif
#if SOC_UART_HP_NUM > 3
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART3] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART3);
}
#endif
#if SOC_UART_HP_NUM > 4
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART4] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART4);
}
#endif
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
#if SOC_PM_SLEEP_CLK_ICG_USE_REGDMA && !CONFIG_PM_SLEEP_CLK_ICG_ENABLE
static bool warned;
if (!warned) {
warned = true;
ESP_LOGW(TAG, "PM_SLEEP_CLK_ICG_ENABLE is disabled. "
"Clock ungate requests may not be honored during sleep.");
}
#endif
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}
components/esp_hw_support/lowpower/port/esp32s31/sleep_clock_icg.c
+71
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@@ -0,0 +1,71 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include <stdint.h>
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_clock_icg.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#if CONFIG_PM_SLP_IRAM_OPT
#define SLEEP_CLOCK_ICG_FN_ATTR FORCE_IRAM_ATTR
#else
#define SLEEP_CLOCK_ICG_FN_ATTR
#endif
static int16_t s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_MAX];
SLEEP_CLOCK_ICG_FN_ATTR uint64_t esp_sleep_clock_get_clk_icg_flags(void)
{
uint64_t icg_flags = 0;
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_IOMUX] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_IOMUX);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_LEDC0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_LEDC0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART0] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART0);
}
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART1] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART1);
}
#if SOC_UART_HP_NUM > 2
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART2] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART2);
}
#endif
#if SOC_UART_HP_NUM > 3
if (s_sleep_clock_icg_refs[ESP_SLEEP_CLOCK_UART3] > 0) {
icg_flags |= PMU_SLEEP_CLK_ICG_BIT(PMU_ICG_FUNC_ENA_UART3);
}
#endif
return icg_flags;
}
esp_err_t esp_sleep_clock_config(esp_sleep_clock_t clock, esp_sleep_clock_option_t option)
{
if (clock >= ESP_SLEEP_CLOCK_MAX || option >= ESP_SLEEP_CLOCK_OPTION_MAX) {
return ESP_ERR_INVALID_ARG;
}
int __attribute__((unused)) refs;
esp_sleep_enter_critical_safe();
refs = (option == ESP_SLEEP_CLOCK_OPTION_UNGATE) ? s_sleep_clock_icg_refs[clock]++ \
: (option == ESP_SLEEP_CLOCK_OPTION_GATE) ? --s_sleep_clock_icg_refs[clock] \
: s_sleep_clock_icg_refs[clock];
esp_sleep_exit_critical_safe();
assert(refs >= 0);
return ESP_OK;
}