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feat(isp): allow to bypass shadow register

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This commit is contained in:
armando
2026-01-07 16:03:28 +08:00
parent f4985641d3
commit 321e86bc1a
11 changed files with 113 additions and 63 deletions
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components/hal/esp32p4/include/hal/isp_ll.h
+84 -48
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@@ -1899,21 +1899,27 @@ static inline void isp_ll_shadow_set_mode(isp_dev_t *hw, isp_ll_shadow_mode_t mo
/**
* @brief Update BLC shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.blc_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.blc_update = 1;
} else {
if (hw->shadow_reg_ctrl.blc_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.blc_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.blc_update = 1;
}
return true;
}
@@ -1921,21 +1927,27 @@ static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw)
/**
* @brief Update DPC shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.dpc_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.dpc_update = 1;
} else {
if (hw->shadow_reg_ctrl.dpc_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.dpc_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.dpc_update = 1;
}
return true;
}
@@ -1943,21 +1955,27 @@ static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw)
/**
* @brief Update BF shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.bf_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.bf_update = 1;
} else {
if (hw->shadow_reg_ctrl.bf_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.bf_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.bf_update = 1;
}
return true;
}
@@ -1965,21 +1983,27 @@ static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw)
/**
* @brief Update WBG shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.wbg_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.wbg_update = 1;
} else {
if (hw->shadow_reg_ctrl.wbg_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.wbg_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.wbg_update = 1;
}
return true;
}
@@ -2015,21 +2039,27 @@ static inline bool isp_ll_shadow_update_ccm(isp_dev_t *hw, bool force_update)
/**
* @brief Update Sharpen shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.sharp_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.sharp_update = 1;
} else {
if (hw->shadow_reg_ctrl.sharp_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.sharp_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.sharp_update = 1;
}
return true;
}
@@ -2037,21 +2067,27 @@ static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw)
/**
* @brief Update Color shadow register
*
* @param[in] hw Hardware instance address
* @param[in] hw Hardware instance address
* @param[in] force_update Force update
* @return
* - True if update is successful, False otherwise
*/
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw, bool force_update)
{
//only valid when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
HAL_ASSERT(hw->shadow_reg_ctrl.shadow_update_sel == ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC);
if (hw->shadow_reg_ctrl.color_update == 1) {
return false;
}
if (force_update) {
//don't care shadow register
hw->shadow_reg_ctrl.color_update = 1;
} else {
if (hw->shadow_reg_ctrl.color_update == 1) {
return false;
}
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.color_update = 1;
//self clear when ISP_SHADOW_MODE_UPDATE_ONLY_NEXT_VSYNC
hw->shadow_reg_ctrl.color_update = 1;
}
return true;
}
@@ -2062,25 +2098,25 @@ static inline void isp_ll_shadow_set_mode(isp_dev_t *hw, isp_ll_shadow_mode_t mo
//for compatibility
}
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_blc(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_dpc(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_bf(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_wbg(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;
@@ -2092,13 +2128,13 @@ static inline bool isp_ll_shadow_update_ccm(isp_dev_t *hw, bool force_update)
return true;
}
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_sharpen(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;
}
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw)
static inline bool isp_ll_shadow_update_color(isp_dev_t *hw, bool force_update)
{
//for compatibility
return true;