diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c
index eefcbfaf3fb..10350bdc115 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c
@@ -17,7 +17,7 @@
 #include "soc/spi_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/soc_caps.h"
-#include "soc/soc_pins.h"
+#include "soc/spi_pins.h"
 #include "soc/chip_revision.h"
 #include "hal/efuse_hal.h"
 #include "hal/gpio_hal.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
index 38bcb84ebf2..553aed51fdf 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
@@ -19,6 +19,7 @@
 #include "bootloader_common.h"
 #include "bootloader_flash_priv.h"
 #include "bootloader_init.h"
+#include "soc/spi_pins.h"
 #include "hal/mmu_hal.h"
 #include "hal/mmu_ll.h"
 #include "hal/cache_hal.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c
index 98c346f5aa7..107da83e9ac 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c
@@ -14,6 +14,7 @@
 #include "esp32c3/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c
index f9b711496a9..1d1ce7e2094 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c
@@ -17,6 +17,7 @@
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
index 759bac5f9bd..51b31956895 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
@@ -13,6 +13,7 @@
 #include "esp32c6/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c
index e5331aaae20..b4863a925ed 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c
@@ -13,6 +13,7 @@
 #include "esp32c61/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
index f1b79e9b8e1..0955677a62d 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
@@ -13,6 +13,7 @@
 #include "esp32h2/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c
index 16d28b31d11..c52086c38e4 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c
@@ -20,6 +20,7 @@
 #include "hal/mspi_ll.h"
 #include "hal/clk_tree_ll.h"
 #include "soc/pcr_reg.h"
+#include "soc/spi_pins.h"
 
 ESP_LOG_ATTR_TAG(TAG, "boot.esp32h21");
 
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
index c481590557e..bfa209bd508 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
@@ -15,6 +15,7 @@
 #include "rom/efuse.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c
index 8722ac904bd..b4cd6f98c0c 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c
@@ -12,6 +12,7 @@
 #include "esp_rom_gpio.h"
 #include "soc/spi_pins.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_common.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c
index 0139d5c98b6..61d8a5f59c2 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c
@@ -16,6 +16,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
index e24506db6e0..3c321ff5857 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
@@ -16,6 +16,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
diff --git a/components/bootloader_support/src/esp32/bootloader_esp32.c b/components/bootloader_support/src/esp32/bootloader_esp32.c
index fef1057ef22..879f7c2ecec 100644
--- a/components/bootloader_support/src/esp32/bootloader_esp32.c
+++ b/components/bootloader_support/src/esp32/bootloader_esp32.c
@@ -24,7 +24,6 @@
 #include "soc/gpio_sig_map.h"
 #include "soc/io_mux_reg.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "hal/gpio_hal.h"
 #include "hal/mmu_hal.h"
 #include "xtensa/config/core.h"
diff --git a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
index 565a1891a4d..3b8f4222587 100644
--- a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
+++ b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/system_reg.h"
 #include "esp32c2/rom/ets_sys.h"
 #include "esp32c2/rom/rtc.h"
diff --git a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
index 931f44999b9..0b19b712216 100644
--- a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
+++ b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
@@ -19,9 +19,7 @@
 #include "esp_cpu.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/system_reg.h"
 #include "soc/chip_revision.h"
 #include "esp32c3/rom/ets_sys.h"
diff --git a/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c b/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c
index ff5d6880fec..8c2f071534f 100644
--- a/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c
+++ b/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c
@@ -19,9 +19,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c5/rom/ets_sys.h"
 #include "esp32c5/rom/spi_flash.h"
diff --git a/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c b/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
index 24264800d4c..32947d8a009 100644
--- a/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
+++ b/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c6/rom/ets_sys.h"
 #include "esp32c6/rom/spi_flash.h"
diff --git a/components/bootloader_support/src/esp32c61/bootloader_esp32c61.c b/components/bootloader_support/src/esp32c61/bootloader_esp32c61.c
index 32f26e8064a..1e97936b481 100644
--- a/components/bootloader_support/src/esp32c61/bootloader_esp32c61.c
+++ b/components/bootloader_support/src/esp32c61/bootloader_esp32c61.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c61/rom/ets_sys.h"
 #include "esp32c61/rom/spi_flash.h"
diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
index dfbcf1765a5..9e0eeab7baa 100644
--- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
+++ b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32h2/rom/ets_sys.h"
 #include "bootloader_common.h"
diff --git a/components/bootloader_support/src/esp32h21/bootloader_esp32h21.c b/components/bootloader_support/src/esp32h21/bootloader_esp32h21.c
index 00e18f5d8e1..483001bae17 100644
--- a/components/bootloader_support/src/esp32h21/bootloader_esp32h21.c
+++ b/components/bootloader_support/src/esp32h21/bootloader_esp32h21.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "rom/ets_sys.h"
 #include "bootloader_common.h"
diff --git a/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c b/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
index 56762087929..70eb57c2af9 100644
--- a/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
+++ b/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "esp32p4/rom/ets_sys.h"
 #include "esp32p4/rom/spi_flash.h"
 #include "bootloader_common.h"
diff --git a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
index 9773d971c81..07f921ce912 100644
--- a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
+++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
@@ -33,7 +33,6 @@
 #include "soc/extmem_reg.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "esp_efuse.h"
 #include "hal/mmu_hal.h"
 #include "hal/cache_hal.h"
diff --git a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
index fc6ffba1356..d35158725ee 100644
--- a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
+++ b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
@@ -17,7 +17,6 @@
 #include "soc/dport_reg.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
 
 #include "esp_rom_gpio.h"
diff --git a/components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h b/components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h
index 08bc9835bd2..e5da02e8aa2 100644
--- a/components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h
+++ b/components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h
@@ -20,7 +20,7 @@
 #include "param_test.h"
 #include "soc/io_mux_reg.h"
 #include "sdkconfig.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_pins.h"
 #include "driver/spi_master.h"
 #include "test_dualboard_utils.h"
 
diff --git a/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c b/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
index e4e3e9e69ae..6f4e657d013 100644
--- a/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
+++ b/components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
@@ -3,14 +3,15 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+#include "esp_log.h"
 #include "test_spi_utils.h"
 #include "driver/spi_slave.h"
-#include "esp_log.h"
+#include "soc/gpio_sig_map.h"
 #include "driver/gpio.h"
 #include "esp_private/gpio.h"
-#include "esp_rom_gpio.h"
-#include "hal/gpio_ll.h"
+#include "soc/spi_periph.h"
 #include "hal/spi_ll.h"
+#include "hal/gpio_ll.h"
 
 const char MASTER_TAG[] = "test_master";
 const char SLAVE_TAG[] = "test_slave";
diff --git a/components/driver/touch_sensor/esp32s2/touch_sensor.c b/components/driver/touch_sensor/esp32s2/touch_sensor.c
index e69dbd9fc1a..be36b7a7f95 100644
--- a/components/driver/touch_sensor/esp32s2/touch_sensor.c
+++ b/components/driver/touch_sensor/esp32s2/touch_sensor.c
@@ -9,7 +9,6 @@
 #include <ctype.h>
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "soc/rtc_cntl_reg.h"
 #include "freertos/FreeRTOS.h"
diff --git a/components/driver/touch_sensor/esp32s3/touch_sensor.c b/components/driver/touch_sensor/esp32s3/touch_sensor.c
index f3254ace293..ea80a590bdf 100644
--- a/components/driver/touch_sensor/esp32s3/touch_sensor.c
+++ b/components/driver/touch_sensor/esp32s3/touch_sensor.c
@@ -9,7 +9,6 @@
 #include <ctype.h>
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "soc/rtc_cntl_reg.h"
 #include "freertos/FreeRTOS.h"
diff --git a/components/driver/touch_sensor/touch_sensor_common.c b/components/driver/touch_sensor/touch_sensor_common.c
index c31aa040df3..de119e5d1e3 100644
--- a/components/driver/touch_sensor/touch_sensor_common.c
+++ b/components/driver/touch_sensor/touch_sensor_common.c
@@ -10,7 +10,6 @@
 #include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"
diff --git a/components/esp_driver_gpio/test_apps/gpio/CMakeLists.txt b/components/esp_driver_gpio/test_apps/gpio/CMakeLists.txt
index 31e5fcf3590..ab82c4518d2 100644
--- a/components/esp_driver_gpio/test_apps/gpio/CMakeLists.txt
+++ b/components/esp_driver_gpio/test_apps/gpio/CMakeLists.txt
@@ -30,10 +30,13 @@ endif()
 
 include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
 message(STATUS "Checking gpio registers are not read-write by half-word")
-check_register_rw_half_word(SOC_MODULES "gpio" "io_mux" "rtc_cntl" "rtc_io" "pcr" "hp_sys_clkrst" "hp_system"
-                                        "lp_aon" "lp_iomux" "pmu"
-                            HAL_MODULES "gpio")
+check_register_rw_half_word(
+    SOC_MODULES "gpio" "io_mux" "rtc_cntl" "rtc_io" "pcr" "hp_sys_clkrst" "hp_system" "lp_aon" "lp_iomux" "pmu"
+    HAL_MODULES "gpio"
+)
 
 message(STATUS "Checking rtcio registers are not read-write by half-word")
-check_register_rw_half_word(SOC_MODULES "rtc_io" "sens" "pcr" "lp_aon" "lp_io" "lp_gpio" "lp_iomux" "lpperi" "pmu"
-                            HAL_MODULES "rtc_io")
+check_register_rw_half_word(
+    SOC_MODULES "rtc_io" "sens" "pcr" "lp_aon" "lp_io" "lp_gpio" "lp_iomux" "lpperi" "pmu"
+    HAL_MODULES "rtc_io"
+)
diff --git a/components/esp_driver_sdmmc/src/sd_host_sdmmc.c b/components/esp_driver_sdmmc/src/sd_host_sdmmc.c
index c358a677cc7..73f6d35c72d 100644
--- a/components/esp_driver_sdmmc/src/sd_host_sdmmc.c
+++ b/components/esp_driver_sdmmc/src/sd_host_sdmmc.c
@@ -15,6 +15,7 @@
 #include "esp_timer.h"
 #include "esp_memory_utils.h"
 #include "soc/chip_revision.h"
+#include "soc/sdmmc_pins.h"
 #include "soc/sdmmc_periph.h"
 #include "soc/soc_caps.h"
 #include "hal/efuse_hal.h"
diff --git a/components/esp_driver_spi/CMakeLists.txt b/components/esp_driver_spi/CMakeLists.txt
index cb1efc7488c..88cd7386d04 100644
--- a/components/esp_driver_spi/CMakeLists.txt
+++ b/components/esp_driver_spi/CMakeLists.txt
@@ -26,7 +26,7 @@ endif()
 idf_component_register(
     SRCS ${srcs}
     INCLUDE_DIRS ${public_include}
-    REQUIRES esp_pm
-    PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio
+    REQUIRES esp_pm esp_hal_gpspi
+    PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio spi_flash esp_psram    #For CONFIG_SPIRAM_SPEED
     LDFRAGMENTS "linker.lf"
 )
diff --git a/components/esp_driver_spi/Kconfig b/components/esp_driver_spi/Kconfig
index 218f0a67eff..5cccd15f845 100644
--- a/components/esp_driver_spi/Kconfig
+++ b/components/esp_driver_spi/Kconfig
@@ -44,7 +44,7 @@ menu "ESP-Driver:SPI Configurations"
         help
             Normally only the ISR of SPI slave is placed in the IRAM, so that it
             can work without the flash when interrupt is triggered.
-            For other functions, there's some possibility that the flash cache
+            For other functions, there is some possibility that the flash cache
             miss when running inside and out of SPI functions, which may increase
             the interval of SPI transactions.
             Enable this to put ``queue_trans``, ``get_trans_result`` and
diff --git a/components/esp_driver_spi/include/driver/spi_common.h b/components/esp_driver_spi/include/driver/spi_common.h
index 9ea2926e7f6..859740127eb 100644
--- a/components/esp_driver_spi/include/driver/spi_common.h
+++ b/components/esp_driver_spi/include/driver/spi_common.h
@@ -177,14 +177,15 @@ esp_err_t spi_bus_free(spi_host_device_t host_id);
 /**
  * @brief Helper function for malloc DMA capable memory for SPI driver
  *
- * @note This API will take care of the cache and hardware alignment internally.
- *       To free/release memory allocated by this helper function, simply calling `free()`
+ * @note Using this API AFTER spi_bus_initialize() is called, this API will take care of the cache and hardware
+ *       alignment internally. To free/release memory allocated by this helper function, simply calling `free()`.
  *
  * @param[in]  host_id          SPI peripheral who will using the memory
  * @param[in]  size             Size in bytes, the amount of memory to allocate
  * @param[in]  extra_heap_caps  Extra heap caps based on MALLOC_CAP_DMA
  *
  * @return                      Pointer to the memory if allocated successfully
+ *         - NULL               If allocation failed or bus not initialized
  */
 void *spi_bus_dma_memory_alloc(spi_host_device_t host_id, size_t size, uint32_t extra_heap_caps);
 
diff --git a/components/esp_driver_spi/include/driver/spi_master.h b/components/esp_driver_spi/include/driver/spi_master.h
index ee547f1a445..67cdcda5aa8 100644
--- a/components/esp_driver_spi/include/driver/spi_master.h
+++ b/components/esp_driver_spi/include/driver/spi_master.h
@@ -103,6 +103,7 @@ typedef struct {
                                  */
 } spi_device_interface_config_t;
 
+// Input flags
 #define SPI_TRANS_MODE_DIO            (1<<0)  ///< Transmit/receive data in 2-bit mode
 #define SPI_TRANS_MODE_QIO            (1<<1)  ///< Transmit/receive data in 4-bit mode
 #define SPI_TRANS_USE_RXDATA          (1<<2)  ///< Receive into rx_data member of spi_transaction_t instead into memory at rx_buffer.
@@ -116,6 +117,11 @@ typedef struct {
 #define SPI_TRANS_MODE_OCT            (1<<10) ///< Transmit/receive data in 8-bit mode
 #define SPI_TRANS_MULTILINE_ADDR      SPI_TRANS_MODE_DIOQIO_ADDR ///< The data lines used at address phase is the same as data phase (otherwise, only one data line is used at address phase)
 #define SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL   (1<<11) ///< By default driver will automatically re-alloc dma buffer if it doesn't meet hardware alignment or dma_capable requirements, this flag is for you to disable this feature, you will need to take care of the alignment otherwise driver will return you error ESP_ERR_INVALID_ARG
+#define SPI_TRANS_DMA_USE_PSRAM       (1<<12) ///< Use PSRAM for DMA buffer directly, has speed limit, but no temp buffer and save memory
+
+// Output flags
+#define SPI_TRANS_DMA_RX_FAIL         (1<<30) ///< RX transaction data lose flag, indicate DMA RX overflow
+#define SPI_TRANS_DMA_TX_FAIL         (1<<31) ///< TX transaction data lose flag, indicate DMA TX underflow
 
 /**
  * This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
diff --git a/components/esp_driver_spi/include/esp_private/spi_common_internal.h b/components/esp_driver_spi/include/esp_private/spi_common_internal.h
index 33671be32d3..e604254ed8e 100644
--- a/components/esp_driver_spi/include/esp_private/spi_common_internal.h
+++ b/components/esp_driver_spi/include/esp_private/spi_common_internal.h
@@ -53,10 +53,11 @@ typedef enum {
 typedef struct {
     spi_bus_config_t bus_cfg;           ///< Config used to initialize the bus
     uint64_t gpio_reserve;              ///< reserved output gpio bit mask
-    uint32_t flags;                     ///< Flags (attributes) of the bus
+    uint32_t flags;                     ///< Flags (SPICOMMON_BUSFLAG_* flag combination of bus abilities) of the bus
     int max_transfer_sz;                ///< Maximum length of bytes available to send
     bool dma_enabled;                   ///< To enable DMA or not
-    size_t internal_mem_align_size;     ///< Buffer align byte requirement for internal memory
+    size_t cache_align_int;             ///< Internal memory align byte requirement
+    size_t cache_align_ext;             ///< External memory align byte requirement
     spi_bus_lock_handle_t lock;
 #ifdef CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock;       ///< Power management lock
@@ -71,9 +72,13 @@ typedef struct {
     spi_dma_chan_handle_t tx_dma_chan;  ///< TX DMA channel, on ESP32 and ESP32S2, tx_dma_chan and rx_dma_chan are same
     spi_dma_chan_handle_t rx_dma_chan;  ///< RX DMA channel, on ESP32 and ESP32S2, tx_dma_chan and rx_dma_chan are same
 #endif
-    int dma_desc_num;               ///< DMA descriptor number of dmadesc_tx or dmadesc_rx.
-    spi_dma_desc_t *dmadesc_tx;     ///< DMA descriptor array for TX
-    spi_dma_desc_t *dmadesc_rx;     ///< DMA descriptor array for RX
+    size_t dma_align_tx_int;            ///< Internal memory align byte requirement for TX
+    size_t dma_align_tx_ext;            ///< External memory align byte requirement for TX
+    size_t dma_align_rx_int;            ///< Internal memory align byte requirement for RX
+    size_t dma_align_rx_ext;            ///< External memory align byte requirement for RX
+    int dma_desc_num;                   ///< DMA descriptor number of dmadesc_tx or dmadesc_rx.
+    spi_dma_desc_t *dmadesc_tx;         ///< DMA descriptor array for TX
+    spi_dma_desc_t *dmadesc_rx;         ///< DMA descriptor array for RX
 } spi_dma_ctx_t;
 
 /// Destructor called when a bus is deinitialized.
@@ -173,12 +178,11 @@ esp_err_t spicommon_dma_chan_free(spi_dma_ctx_t *dma_ctx);
  *              - ``SPICOMMON_BUSFLAG_QUAD``: Combination of ``SPICOMMON_BUSFLAG_DUAL`` and ``SPICOMMON_BUSFLAG_WPHD``.
  *              - ``SPICOMMON_BUSFLAG_IO4_IO7``: The bus has spi data4 ~ spi data7 connected.
  *              - ``SPICOMMON_BUSFLAG_OCTAL``: Combination of ``SPICOMMON_BUSFLAG_QUAL`` and ``SPICOMMON_BUSFLAG_IO4_IO7``.
- * @param[out] io_reserved Output the reserved gpio map
  * @return
  *         - ESP_ERR_INVALID_ARG   if parameter is invalid
  *         - ESP_OK                on success
  */
-esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_config_t *bus_config, uint32_t flags, uint32_t *flags_o,  uint64_t *io_reserved);
+esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_config_t *bus_config, uint32_t flags, uint32_t *flags_o, uint64_t *io_reserved);
 
 /**
  * @brief Free the IO used by a SPI peripheral
@@ -200,7 +204,6 @@ esp_err_t spicommon_bus_free_io_cfg(const spi_bus_config_t *bus_cfg, uint64_t *i
  * @param cs_id Hardware CS id to route
  * @param force_gpio_matrix If true, CS will always be routed through the GPIO matrix. If false,
  *                          if the GPIO number allows it, the routing will happen through the IO_mux.
- * @param[out] io_reserved Output the reserved gpio map
  */
 void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_id, int force_gpio_matrix, uint64_t *io_reserved);
 
diff --git a/components/esp_driver_spi/include/esp_private/spi_dma.h b/components/esp_driver_spi/include/esp_private/spi_dma.h
index 32c4c9e94b5..38cf08020dc 100644
--- a/components/esp_driver_spi/include/esp_private/spi_dma.h
+++ b/components/esp_driver_spi/include/esp_private/spi_dma.h
@@ -5,6 +5,7 @@
  */
 
 #pragma once
+#include <stddef.h>
 #include "stdbool.h"
 #include "hal/spi_types.h"
 
@@ -36,6 +37,15 @@ typedef struct {
  */
 void spi_dma_enable_burst(spi_dma_chan_handle_t chan_handle, bool data_burst, bool desc_burst);
 
+/**
+ * Get the alignment constraints for DMA
+ *
+ * @param chan_handle   Context of the spi_dma channel.
+ * @param internal_size The alignment size for internal memory.
+ * @param external_size The alignment size for external memory.
+ */
+void spi_dma_get_alignment_constraints(spi_dma_chan_handle_t chan_handle, size_t *internal_size, size_t *external_size);
+
 /**
  * Re-trigger a HW pre-load to pick up appended linked descriptor
  *
diff --git a/components/esp_driver_spi/linker.lf b/components/esp_driver_spi/linker.lf
index 7a5832f1891..faa66ce40c9 100644
--- a/components/esp_driver_spi/linker.lf
+++ b/components/esp_driver_spi/linker.lf
@@ -1,5 +1,5 @@
 [mapping:gpspi_hal]
-archive: libhal.a
+archive: libesp_hal_gpspi.a
 entries:
     if SPI_MASTER_ISR_IN_IRAM = y:
         spi_hal_iram (noflash)
diff --git a/components/esp_driver_spi/src/gpspi/spi_common.c b/components/esp_driver_spi/src/gpspi/spi_common.c
index ea8970c6040..648683d07b3 100644
--- a/components/esp_driver_spi/src/gpspi/spi_common.c
+++ b/components/esp_driver_spi/src/gpspi/spi_common.c
@@ -6,6 +6,7 @@
 
 #include <string.h>
 #include <stdatomic.h>
+#include <sys/param.h>
 #include "sdkconfig.h"
 #include "esp_types.h"
 #include "esp_attr.h"
@@ -248,6 +249,10 @@ static esp_err_t alloc_dma_chan(spi_host_device_t host_id, spi_dma_chan_t dma_ch
 
     spi_dma_enable_burst(dma_ctx->tx_dma_chan, true, true);
     spi_dma_enable_burst(dma_ctx->rx_dma_chan, true, true);
+
+    // Get DMA alignment constraints
+    spi_dma_get_alignment_constraints(dma_ctx->tx_dma_chan, &dma_ctx->dma_align_tx_int, &dma_ctx->dma_align_tx_ext);
+    spi_dma_get_alignment_constraints(dma_ctx->rx_dma_chan, &dma_ctx->dma_align_rx_int, &dma_ctx->dma_align_rx_ext);
     return ret;
 }
 
@@ -288,13 +293,16 @@ static esp_err_t alloc_dma_chan(spi_host_device_t host_id, spi_dma_chan_t dma_ch
             gdma_connect(dma_ctx->rx_dma_chan, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3));
         }
 #endif
-        // TODO: add support to allow SPI transfer PSRAM buffer
         gdma_transfer_config_t trans_cfg = {
             .max_data_burst_size = 16,
-            .access_ext_mem = false,
+            .access_ext_mem = true, // allow to transfer data from/to external memory directly by DMA
         };
         ESP_RETURN_ON_ERROR(gdma_config_transfer(dma_ctx->tx_dma_chan, &trans_cfg), SPI_TAG, "config gdma tx transfer failed");
         ESP_RETURN_ON_ERROR(gdma_config_transfer(dma_ctx->rx_dma_chan, &trans_cfg), SPI_TAG, "config gdma rx transfer failed");
+
+        // Get DMA alignment constraints
+        gdma_get_alignment_constraints(dma_ctx->tx_dma_chan, &dma_ctx->dma_align_tx_int, &dma_ctx->dma_align_tx_ext);
+        gdma_get_alignment_constraints(dma_ctx->rx_dma_chan, &dma_ctx->dma_align_rx_int, &dma_ctx->dma_align_rx_ext);
     }
     return ret;
 }
@@ -721,12 +729,14 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
 #endif //SOC_SPI_SUPPORT_OCT
     }
 
+    if (bus_ctx[host]) {
+        bus_ctx[host]->bus_attr.bus_cfg = *bus_config;
+        bus_ctx[host]->bus_attr.flags = temp_flag;
+        bus_ctx[host]->bus_attr.gpio_reserve = gpio_reserv;
+    }
     if (flags_o) {
         *flags_o = temp_flag;
     }
-    if (io_reserved) {
-        *io_reserved |= gpio_reserv;
-    }
     return ESP_OK;
 }
 
@@ -770,9 +780,7 @@ void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_id, i
         }
         gpio_func_sel(cs_io_num, PIN_FUNC_GPIO);
     }
-    if (io_reserved) {
-        *io_reserved |= out_mask;
-    }
+    bus_ctx[host]->bus_attr.gpio_reserve |= out_mask;
 }
 
 void spicommon_cs_free_io(int cs_gpio_num, uint64_t *io_reserved)
@@ -821,14 +829,12 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
 #endif
 
     ESP_RETURN_ON_ERROR(spicommon_bus_alloc(host_id, "spi master"), SPI_TAG, "alloc host failed");
-    spi_bus_attr_t *bus_attr = (spi_bus_attr_t *)spi_bus_get_attr(host_id);
-    spicommon_bus_context_t *ctx = __containerof(bus_attr, spicommon_bus_context_t, bus_attr);
-    assert(bus_attr && ctx);  //coverity check
-    bus_attr->bus_cfg = *bus_config;
-
-    if (dma_chan != SPI_DMA_DISABLED) {
-        bus_attr->dma_enabled = 1;
+    spicommon_bus_context_t *ctx = bus_ctx[host_id];
+    spi_bus_attr_t *bus_attr = &ctx->bus_attr;
 
+    bus_attr->dma_enabled = (dma_chan != SPI_DMA_DISABLED);
+    bus_attr->max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE;
+    if (bus_attr->dma_enabled) {
         err = spicommon_dma_chan_alloc(host_id, dma_chan, &ctx->dma_ctx);
         if (err != ESP_OK) {
             goto cleanup;
@@ -837,14 +843,10 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
         if (err != ESP_OK) {
             goto cleanup;
         }
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-        esp_cache_get_alignment(MALLOC_CAP_DMA, (size_t *)&bus_attr->internal_mem_align_size);
-#else
-        bus_attr->internal_mem_align_size = 4;
-#endif
-    } else {
-        bus_attr->dma_enabled = 0;
-        bus_attr->max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE;
+
+        // Get cache alignment constraints
+        esp_cache_get_alignment(MALLOC_CAP_DMA, &bus_attr->cache_align_int);
+        esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &bus_attr->cache_align_ext);
     }
 
     spi_bus_lock_config_t lock_config = {
@@ -869,7 +871,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
 
     _lock_acquire(&ctx->mutex);
     if (sleep_retention_module_init(spi_reg_retention_info[host_id - 1].module_id, &init_param) == ESP_OK) {
-        if ((bus_attr->bus_cfg.flags & SPICOMMON_BUSFLAG_SLP_ALLOW_PD) && (sleep_retention_module_allocate(spi_reg_retention_info[host_id - 1].module_id) != ESP_OK)) {
+        if ((bus_config->flags & SPICOMMON_BUSFLAG_SLP_ALLOW_PD) && (sleep_retention_module_allocate(spi_reg_retention_info[host_id - 1].module_id) != ESP_OK)) {
             // even though the sleep retention create failed, SPI driver should still work, so just warning here
             ESP_LOGW(SPI_TAG, "alloc sleep recover failed, peripherals may hold power on");
         }
@@ -879,7 +881,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
     }
     _lock_release(&ctx->mutex);
 #else
-    if (bus_attr->bus_cfg.flags & SPICOMMON_BUSFLAG_SLP_ALLOW_PD) {
+    if (bus_config->flags & SPICOMMON_BUSFLAG_SLP_ALLOW_PD) {
         ESP_LOGE(SPI_TAG, "power down peripheral in sleep is not enabled or not supported on your target");
     }
 #endif  // SOC_SPI_SUPPORT_SLEEP_RETENTION
@@ -898,7 +900,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
     }
 #endif //CONFIG_PM_ENABLE
 
-    err = spicommon_bus_initialize_io(host_id, bus_config, SPICOMMON_BUSFLAG_MASTER | bus_config->flags, &bus_attr->flags, &bus_attr->gpio_reserve);
+    err = spicommon_bus_initialize_io(host_id, bus_config, SPICOMMON_BUSFLAG_MASTER | bus_config->flags, NULL, NULL);
     if (err != ESP_OK) {
         goto cleanup;
     }
@@ -926,11 +928,17 @@ cleanup:
 
 void *spi_bus_dma_memory_alloc(spi_host_device_t host_id, size_t size, uint32_t extra_heap_caps)
 {
-    (void) host_id; //remain for extendability
-    ESP_RETURN_ON_FALSE((extra_heap_caps & MALLOC_CAP_SPIRAM) == 0, NULL, SPI_TAG, "external memory is not supported now");
+    SPI_CHECK(bus_ctx[host_id], "SPI %d not initialized", NULL, host_id + 1);
 
-    size_t dma_requir = 16;  //TODO: IDF-10111, using max alignment temp, refactor to "gdma_get_alignment_constraints" instead
-    return heap_caps_aligned_calloc(dma_requir, 1, size, extra_heap_caps | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
+    size_t alignment = 16;
+    // detailed alignment requirement is not available for slave bus, so use 16 bytes as default
+    if (bus_ctx[host_id]->bus_attr.flags & SPICOMMON_BUSFLAG_MASTER) {
+        // As don't know the buffer will used for TX or RX, so use the max alignment requirement
+        alignment = (extra_heap_caps & MALLOC_CAP_SPIRAM) ? \
+                    MAX(bus_ctx[host_id]->dma_ctx->dma_align_tx_ext, bus_ctx[host_id]->dma_ctx->dma_align_rx_ext) : \
+                    MAX(bus_ctx[host_id]->dma_ctx->dma_align_tx_int, bus_ctx[host_id]->dma_ctx->dma_align_rx_int);
+    }
+    return heap_caps_aligned_calloc(alignment, 1, size, extra_heap_caps | MALLOC_CAP_DMA);
 }
 
 const spi_bus_attr_t* spi_bus_get_attr(spi_host_device_t host_id)
diff --git a/components/esp_driver_spi/src/gpspi/spi_dma.c b/components/esp_driver_spi/src/gpspi/spi_dma.c
index a02bf43df85..84c913a13c3 100644
--- a/components/esp_driver_spi/src/gpspi/spi_dma.c
+++ b/components/esp_driver_spi/src/gpspi/spi_dma.c
@@ -27,6 +27,18 @@ void spi_dma_enable_burst(spi_dma_chan_handle_t chan_handle, bool data_burst, bo
     }
 }
 
+void spi_dma_get_alignment_constraints(spi_dma_chan_handle_t chan_handle, size_t *internal_size, size_t *external_size)
+{
+    spi_dma_dev_t *spi_dma = SPI_LL_GET_HW(chan_handle.host_id);
+
+    if (chan_handle.dir == DMA_CHANNEL_DIRECTION_TX) {
+        *internal_size = 1; // TX don't need to follow dma alignment in driver design
+        *external_size = 1;
+    } else {
+        spi_dma_ll_get_rx_alignment_require(spi_dma, (uint32_t *)internal_size, (uint32_t *)external_size);
+    }
+}
+
 #if SOC_SPI_SUPPORT_SLAVE_HD_VER2
 void spi_dma_append(spi_dma_chan_handle_t chan_handle)
 {
diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c
index 3994e132e24..99adebb6d2c 100644
--- a/components/esp_driver_spi/src/gpspi/spi_master.c
+++ b/components/esp_driver_spi/src/gpspi/spi_master.c
@@ -116,6 +116,7 @@ We have two bits to control the interrupt:
 #include "esp_private/spi_common_internal.h"
 #include "esp_private/spi_master_internal.h"
 #include "esp_private/esp_clk_tree_common.h"
+#include "esp_private/cache_utils.h"
 #include "driver/spi_master.h"
 #include "clk_ctrl_os.h"
 #include "esp_log.h"
@@ -131,10 +132,6 @@ We have two bits to control the interrupt:
 #include "hal/spi_hal.h"
 #include "hal/spi_ll.h"
 #include "hal/hal_utils.h"
-#include "esp_heap_caps.h"
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-#include "esp_cache.h"
-#endif
 
 #ifdef CONFIG_SPI_MASTER_ISR_IN_IRAM
 #define SPI_MASTER_ISR_ATTR IRAM_ATTR
@@ -162,7 +159,25 @@ We have two bits to control the interrupt:
 
 #define SPI_PERIPH_SRC_FREQ_MAX     (80*1000*1000)    //peripheral hardware limitation for clock source into peripheral
 
-static const char *SPI_TAG = "spi_master";
+/**
+ * The approx time for dma setup and pop data into peripheral
+ * This time is theoretically inverse proportion to the PSRAM speed(bandwidth), and direct proportion to the SPI speed, but hard to accurately calculated
+ * Below is an engineering value based on experience test result, e.g. delay 5us for 20MHz PSRAM speed, 1us for 80M
+ * Then the formula is: Delay_time = K * (SPI_SPEED / PSRAM_SPEED) + B
+ *      delay
+ *         ▲
+ *         │ x
+ *         │   x
+ *         │      x
+ *         │         x  x
+ *        ─┼─────────────────►
+ *         │          psram speed
+ */
+#define K_EDMA_SETUP_RATIO      1 / 50000
+#define B_EDMA_SETUP_TIME_US    1
+#define SPI_EDMA_SETUP_TIME_US(spi_speed) ((spi_speed) * K_EDMA_SETUP_RATIO / CONFIG_SPIRAM_SPEED + B_EDMA_SETUP_TIME_US)
+
+ESP_LOG_ATTR_TAG_DRAM(SPI_TAG, "spi_master");
 #define SPI_CHECK(a, str, ret_val, ...)  ESP_RETURN_ON_FALSE_ISR(a, ret_val, SPI_TAG, str, ##__VA_ARGS__)
 
 typedef struct spi_device_t spi_device_t;
@@ -536,7 +551,7 @@ esp_err_t spi_bus_add_device(spi_host_device_t host_id, const spi_device_interfa
 
     //Set CS pin, CS options
     if (dev_config->spics_io_num >= 0) {
-        spicommon_cs_initialize(host_id, dev_config->spics_io_num, freecs, use_gpio, (uint64_t *)&bus_attr->gpio_reserve);
+        spicommon_cs_initialize(host_id, dev_config->spics_io_num, freecs, use_gpio, NULL);
     }
 
     //save a pointer to device in spi_host_t
@@ -756,31 +771,13 @@ static void SPI_MASTER_ISR_ATTR s_spi_dma_prepare_data(spi_host_t *host, spi_hal
     }
 }
 
-static void SPI_MASTER_ISR_ATTR s_spi_prepare_data(spi_device_t *dev, const spi_hal_trans_config_t *hal_trans)
-{
-    spi_host_t *host = dev->host;
-    spi_hal_dev_config_t *hal_dev = &(dev->hal_dev);
-    spi_hal_context_t *hal = &(host->hal);
-
-    if (host->bus_attr->dma_enabled) {
-        s_spi_dma_prepare_data(host, hal, hal_dev, hal_trans);
-    } else {
-        //Need to copy data to registers manually
-        spi_hal_push_tx_buffer(hal, hal_trans);
-    }
-
-    //in ESP32 these registers should be configured after the DMA is set
-    spi_hal_enable_data_line(hal->hw, (!hal_dev->half_duplex && hal_trans->rcv_buffer) || hal_trans->send_buffer, !!hal_trans->rcv_buffer);
-}
-
 static void SPI_MASTER_ISR_ATTR spi_format_hal_trans_struct(spi_device_t *dev, spi_trans_priv_t *trans_buf, spi_hal_trans_config_t *hal_trans)
 {
-    spi_host_t *host = dev->host;
     spi_transaction_t *trans = trans_buf->trans;
     hal_trans->tx_bitlen = trans->length;
     hal_trans->rx_bitlen = trans->rxlength;
-    hal_trans->rcv_buffer = (uint8_t*)host->cur_trans_buf.buffer_to_rcv;
-    hal_trans->send_buffer = (uint8_t*)host->cur_trans_buf.buffer_to_send;
+    hal_trans->rcv_buffer = (uint8_t *)trans_buf->buffer_to_rcv;
+    hal_trans->send_buffer = (uint8_t *)trans_buf->buffer_to_send;
     hal_trans->cmd = trans->cmd;
     hal_trans->addr = trans->addr;
 
@@ -816,6 +813,7 @@ static void SPI_MASTER_ISR_ATTR spi_format_hal_trans_struct(spi_device_t *dev, s
 // Setup the transaction-specified registers and linked-list used by the DMA (or FIFO if DMA is not used)
 static void SPI_MASTER_ISR_ATTR spi_new_trans(spi_device_t *dev, spi_trans_priv_t *trans_buf)
 {
+    spi_host_t *host = dev->host;
     spi_transaction_t *trans = trans_buf->trans;
     spi_hal_context_t *hal = &(dev->host->hal);
     spi_hal_dev_config_t *hal_dev = &(dev->hal_dev);
@@ -829,12 +827,27 @@ static void SPI_MASTER_ISR_ATTR spi_new_trans(spi_device_t *dev, spi_trans_priv_
     spi_hal_trans_config_t hal_trans = {};
     spi_format_hal_trans_struct(dev, trans_buf, &hal_trans);
     spi_hal_setup_trans(hal, hal_dev, &hal_trans);
-    s_spi_prepare_data(dev, &hal_trans);
+
+    if (host->bus_attr->dma_enabled) {
+        s_spi_dma_prepare_data(host, hal, hal_dev, &hal_trans);
+    } else {
+        //Need to copy data to registers manually
+        spi_hal_push_tx_buffer(hal, &hal_trans);
+    }
+    //these registers should be configured after the DMA is set
+    spi_hal_enable_data_line(hal->hw, (!hal_dev->half_duplex && hal_trans.rcv_buffer) || hal_trans.send_buffer, !!hal_trans.rcv_buffer);
 
     //Call pre-transmission callback, if any
     if (dev->cfg.pre_cb) {
         dev->cfg.pre_cb(trans);
     }
+#if CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE
+    spi_hal_clear_intr_mask(hal, SPI_LL_INTR_IN_FULL | SPI_LL_INTR_OUT_EMPTY);
+    if (esp_ptr_dma_ext_capable(hal_trans.send_buffer)) {
+        // ! Delay here is required for EDMA to pass data from PSRAM to GPSPI
+        esp_rom_delay_us(SPI_EDMA_SETUP_TIME_US(hal_dev->timing_conf.real_freq));
+    }
+#endif
     //Kick off transfer
     spi_hal_user_start(hal);
 }
@@ -932,6 +945,26 @@ static void SPI_MASTER_ISR_ATTR spi_post_sct_trans(spi_host_t *host)
 }
 #endif  //#if SOC_SPI_SCT_SUPPORTED
 
+static void SPI_MASTER_ISR_ATTR spi_trans_dma_error_check(spi_host_t *host)
+{
+#if SOC_PSRAM_DMA_CAPABLE && CONFIG_SPIRAM   //error checks only for psram dma
+    if (!host->sct_mode_enabled) {
+        if (esp_ptr_external_ram(host->cur_trans_buf.buffer_to_rcv) && spi_hal_get_intr_mask(&host->hal, SPI_LL_INTR_IN_FULL)) {
+            host->cur_trans_buf.trans->flags |= SPI_TRANS_DMA_RX_FAIL;
+            ESP_DRAM_LOGE(SPI_TAG, "DMA RX overflow detected");
+        } else {
+            host->cur_trans_buf.trans->flags &= ~SPI_TRANS_DMA_RX_FAIL;
+        }
+        if (esp_ptr_external_ram(host->cur_trans_buf.buffer_to_send) && spi_hal_get_intr_mask(&host->hal, SPI_LL_INTR_OUT_EMPTY)) {
+            host->cur_trans_buf.trans->flags |= SPI_TRANS_DMA_TX_FAIL;
+            ESP_DRAM_LOGE(SPI_TAG, "DMA TX underflow detected");
+        } else {
+            host->cur_trans_buf.trans->flags &= ~SPI_TRANS_DMA_TX_FAIL;
+        }
+    }
+#endif
+}
+
 // This is run in interrupt context.
 static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
 {
@@ -969,18 +1002,7 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
             //This workaround is only for esp32, where tx_dma_chan and rx_dma_chan are always same
             spicommon_dmaworkaround_idle(dma_ctx->tx_dma_chan.chan_id);
 #endif  //#if CONFIG_IDF_TARGET_ESP32
-
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE   //invalidate here to let user access rx data in post_cb if possible
-            if (host->cur_trans_buf.buffer_to_rcv) {
-                uint16_t alignment = bus_attr->internal_mem_align_size;
-                uint32_t buffer_byte_len = (host->cur_trans_buf.trans->rxlength + 7) / 8;
-                buffer_byte_len = (buffer_byte_len + alignment - 1) & (~(alignment - 1));
-                // invalidate priv_trans.buffer_to_rcv anyway, only user provide aligned buffer can rcv correct data in post_cb
-                esp_err_t ret = esp_cache_msync((void *)host->cur_trans_buf.buffer_to_rcv, buffer_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
-                assert(ret == ESP_OK);
-                (void)ret;
-            }
-#endif
+            spi_trans_dma_error_check(host);
         }
 
 #if SOC_SPI_SCT_SUPPORTED
@@ -1132,108 +1154,100 @@ static SPI_MASTER_ISR_ATTR esp_err_t check_trans_valid(spi_device_handle_t handl
         SPI_CHECK(trans_desc->length <= SPI_LL_CPU_MAX_BIT_LEN, "txdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
         SPI_CHECK(trans_desc->rxlength <= SPI_LL_CPU_MAX_BIT_LEN, "rxdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
     }
-
+    if (esp_ptr_external_ram(trans_desc->tx_buffer) || esp_ptr_external_ram(trans_desc->rx_buffer)) {
+        SPI_CHECK(spi_flash_cache_enabled(), "Using PSRAM must when cache is enabled", ESP_ERR_INVALID_STATE);
+    }
     return ESP_OK;
 }
 
 static SPI_MASTER_ISR_ATTR void uninstall_priv_desc(spi_trans_priv_t* trans_buf)
 {
     spi_transaction_t *trans_desc = trans_buf->trans;
-    if ((void *)trans_buf->buffer_to_send != &trans_desc->tx_data[0] &&
-            trans_buf->buffer_to_send != trans_desc->tx_buffer) {
+    if ((void *)trans_buf->buffer_to_send != trans_desc->tx_data && trans_buf->buffer_to_send != trans_desc->tx_buffer) {
         free((void *)trans_buf->buffer_to_send); //force free, ignore const
     }
-    // copy data from temporary DMA-capable buffer back to IRAM buffer and free the temporary one.
-    if (trans_buf->buffer_to_rcv && (void *)trans_buf->buffer_to_rcv != &trans_desc->rx_data[0] && trans_buf->buffer_to_rcv != trans_desc->rx_buffer) { // NOLINT(clang-analyzer-unix.Malloc)
-        if (trans_desc->flags & SPI_TRANS_USE_RXDATA) {
-            memcpy((uint8_t *) & trans_desc->rx_data[0], trans_buf->buffer_to_rcv, (trans_desc->rxlength + 7) / 8);
-        } else {
-            memcpy(trans_desc->rx_buffer, trans_buf->buffer_to_rcv, (trans_desc->rxlength + 7) / 8);
-        }
+
+    // copy data from temporary DMA-capable buffer back to trans_desc buffer and free the temporary one.
+    void *orig_rx_buffer = (trans_desc->flags & SPI_TRANS_USE_RXDATA) ? trans_desc->rx_data : trans_desc->rx_buffer;
+    if (trans_buf->buffer_to_rcv != orig_rx_buffer) {
+        memcpy(orig_rx_buffer, trans_buf->buffer_to_rcv, (trans_desc->rxlength + 7) / 8);
         free(trans_buf->buffer_to_rcv);
     }
 }
 
+static SPI_MASTER_ISR_ATTR esp_err_t setup_dma_priv_buffer(spi_host_t *host, uint32_t *buffer, uint32_t len, bool is_tx, uint32_t flags, uint32_t **ret_buffer)
+{
+#if CONFIG_IDF_TARGET_ESP32S2
+    ESP_RETURN_ON_FALSE_ISR((host->id != SPI3_HOST) || !(flags & SPI_TRANS_DMA_USE_PSRAM), ESP_ERR_NOT_SUPPORTED, SPI_TAG, "SPI3 does not support external memory");
+#endif
+    bool is_ptr_ext = esp_ptr_external_ram(buffer);
+    bool use_psram = is_ptr_ext && (flags & SPI_TRANS_DMA_USE_PSRAM);
+    bool need_malloc = is_ptr_ext ? (!use_psram || !esp_ptr_dma_ext_capable(buffer)) : !esp_ptr_dma_capable(buffer);
+    uint16_t alignment = 0;
+    // If psram is wanted, re-malloc also from psram.
+    uint32_t mem_cap = MALLOC_CAP_DMA | (use_psram ? MALLOC_CAP_SPIRAM : MALLOC_CAP_INTERNAL);
+    if (is_tx) {
+        alignment = use_psram ? host->dma_ctx->dma_align_tx_ext : host->dma_ctx->dma_align_tx_int;
+    } else {
+        // RX cache sync still need consider the cache alignment requirement
+        if (use_psram) {
+            alignment = MAX(host->dma_ctx->dma_align_rx_ext, host->bus_attr->cache_align_ext);
+        } else {
+            alignment = MAX(host->dma_ctx->dma_align_rx_int, host->bus_attr->cache_align_int);
+        }
+    }
+    need_malloc |= (((uint32_t)buffer | len) & (alignment - 1));
+    ESP_EARLY_LOGV(SPI_TAG, "%s %p, len %d, is_ptr_ext %d, use_psram: %d, alignment: %d, need_malloc: %d from %s", is_tx ? "TX" : "RX", buffer, len, is_ptr_ext, use_psram, alignment, need_malloc, (mem_cap & MALLOC_CAP_SPIRAM) ? "psram" : "internal");
+    if (need_malloc) {
+        ESP_RETURN_ON_FALSE_ISR(!(flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but %s addr&len not align to %d, or not dma_capable", is_tx ? "TX" : "RX", alignment);
+        len = (len + alignment - 1) & (~(alignment - 1));   // up align alignment
+        uint32_t *temp = heap_caps_aligned_alloc(alignment, len, mem_cap);
+        ESP_RETURN_ON_FALSE_ISR(temp != NULL, ESP_ERR_NO_MEM, SPI_TAG, "Failed to allocate priv %s buffer", is_tx ? "TX" : "RX");
+
+        if (is_tx) {
+            memcpy(temp, buffer, len);
+        }
+        buffer = temp;
+    }
+    esp_err_t ret = esp_cache_msync((void *)buffer, len, is_tx ? (ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED) : ESP_CACHE_MSYNC_FLAG_DIR_M2C);
+    // ESP_ERR_NOT_SUPPORTED stands for not cache sync required, it's allowed here
+    ESP_RETURN_ON_FALSE_ISR((ret == ESP_OK) || (ret == ESP_ERR_NOT_SUPPORTED), ESP_ERR_INVALID_ARG, SPI_TAG, "sync failed for %s buffer", is_tx ? "TX" : "RX");
+    *ret_buffer = buffer;
+    return ESP_OK;
+}
+
 static SPI_MASTER_ISR_ATTR esp_err_t setup_priv_desc(spi_host_t *host, spi_trans_priv_t* priv_desc)
 {
     spi_transaction_t *trans_desc = priv_desc->trans;
     const spi_bus_attr_t *bus_attr = host->bus_attr;
-    uint16_t alignment = bus_attr->internal_mem_align_size;
 
     // rx memory assign
-    uint32_t* rcv_ptr;
-    if (trans_desc->flags & SPI_TRANS_USE_RXDATA) {
-        rcv_ptr = (uint32_t *)&trans_desc->rx_data[0];
-    } else {
-        //if not use RXDATA neither rx_buffer, buffer_to_rcv assigned to NULL
-        rcv_ptr = trans_desc->rx_buffer;
-    }
-
+    uint32_t* rcv_ptr = (trans_desc->flags & SPI_TRANS_USE_RXDATA) ? (uint32_t *)trans_desc->rx_data : (uint32_t *)trans_desc->rx_buffer;
     // tx memory assign
-    const uint32_t *send_ptr;
-    if (trans_desc->flags & SPI_TRANS_USE_TXDATA) {
-        send_ptr = (uint32_t *)&trans_desc->tx_data[0];
-    } else {
-        //if not use TXDATA neither tx_buffer, tx data assigned to NULL
-        send_ptr = trans_desc->tx_buffer ;
-    }
-
-    uint32_t tx_byte_len = (trans_desc->length + 7) / 8;
-    uint32_t rx_byte_len = (trans_desc->rxlength + 7) / 8;
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-    bool tx_unaligned = ((((uint32_t)send_ptr) | tx_byte_len) & (alignment - 1));
-    bool rx_unaligned = ((((uint32_t)rcv_ptr) | rx_byte_len) & (alignment - 1));
-#else
-    bool tx_unaligned = false;   //tx don't need align on addr or length, for other chips
-    bool rx_unaligned = (((uint32_t)rcv_ptr) & (alignment - 1));
-#endif
+    uint32_t *send_ptr = (trans_desc->flags & SPI_TRANS_USE_TXDATA) ? (uint32_t *)trans_desc->tx_data : (uint32_t *)trans_desc->tx_buffer;
 
+    esp_err_t ret = ESP_OK;
     if (send_ptr && bus_attr->dma_enabled) {
-        if ((!esp_ptr_dma_capable(send_ptr) || tx_unaligned)) {
-            ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but TX buffer addr&len not align to %d byte, or not dma_capable", alignment);
-            //if txbuf in the desc not DMA-capable, or not bytes aligned to alignment, malloc a new one
-            ESP_EARLY_LOGD(SPI_TAG, "Allocate TX buffer for DMA");
-            tx_byte_len = (tx_byte_len + alignment - 1) & (~(alignment - 1));   // up align alignment
-            uint32_t *temp = heap_caps_aligned_alloc(alignment, tx_byte_len, MALLOC_CAP_DMA);
-            if (temp == NULL) {
-                goto clean_up;
-            }
-
-            memcpy(temp, send_ptr, (trans_desc->length + 7) / 8);
-            send_ptr = temp;
+        ret = setup_dma_priv_buffer(host, send_ptr, (trans_desc->length + 7) / 8, true, trans_desc->flags, &send_ptr);
+        if (ret != ESP_OK) {
+            goto clean_up;
         }
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-        esp_err_t ret = esp_cache_msync((void *)send_ptr, tx_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
-        assert(ret == ESP_OK);
-        (void)ret;
-#endif
     }
 
     if (rcv_ptr && bus_attr->dma_enabled) {
-        if ((!esp_ptr_dma_capable(rcv_ptr) || rx_unaligned)) {
-            ESP_RETURN_ON_FALSE(!(trans_desc->flags & SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL), ESP_ERR_INVALID_ARG, SPI_TAG, "Set flag SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL but RX buffer addr&len not align to %d byte, or not dma_capable", alignment);
-            //if rxbuf in the desc not DMA-capable, or not aligned to alignment, malloc a new one
-            ESP_EARLY_LOGD(SPI_TAG, "Allocate RX buffer for DMA");
-            rx_byte_len = (rx_byte_len + alignment - 1) & (~(alignment - 1));   // up align alignment
-            rcv_ptr = heap_caps_aligned_alloc(alignment, rx_byte_len, MALLOC_CAP_DMA);
-            if (rcv_ptr == NULL) {
-                goto clean_up;
-            }
+        ret = setup_dma_priv_buffer(host, rcv_ptr, (trans_desc->rxlength + 7) / 8, false, trans_desc->flags, &rcv_ptr);
+        if (ret != ESP_OK) {
+            goto clean_up;
         }
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
-        // do invalid here to hold on cache status to avoid hardware auto write back during dma transaction
-        esp_err_t ret = esp_cache_msync((void *)rcv_ptr, rx_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
-        assert(ret == ESP_OK);
-        (void)ret;
-#endif
     }
+
     priv_desc->buffer_to_send = send_ptr;
     priv_desc->buffer_to_rcv = rcv_ptr;
     return ESP_OK;
 
 clean_up:
     uninstall_priv_desc(priv_desc);
-    return ESP_ERR_NO_MEM;
+    return ret;
 }
 
 esp_err_t SPI_MASTER_ATTR spi_device_queue_trans(spi_device_handle_t handle, spi_transaction_t *trans_desc, uint32_t ticks_to_wait)
@@ -1293,7 +1307,6 @@ esp_err_t SPI_MASTER_ATTR spi_device_get_trans_result(spi_device_handle_t handle
     BaseType_t r;
     spi_trans_priv_t trans_buf;
     SPI_CHECK(handle != NULL, "invalid dev handle", ESP_ERR_INVALID_ARG);
-    bool use_dma = handle->host->bus_attr->dma_enabled;
 
     //if SPI_DEVICE_NO_RETURN_RESULT is set, ret_queue will always be empty
     SPI_CHECK(!(handle->cfg.flags & SPI_DEVICE_NO_RETURN_RESULT), "API not Supported!", ESP_ERR_NOT_SUPPORTED);
@@ -1307,12 +1320,10 @@ esp_err_t SPI_MASTER_ATTR spi_device_get_trans_result(spi_device_handle_t handle
         return ESP_ERR_TIMEOUT;
     }
     //release temporary buffers used by dma
-    if (use_dma) {
-        uninstall_priv_desc(&trans_buf);
-    }
+    uninstall_priv_desc(&trans_buf);
     (*trans_desc) = trans_buf.trans;
 
-    return ESP_OK;
+    return (trans_buf.trans->flags & (SPI_TRANS_DMA_RX_FAIL | SPI_TRANS_DMA_TX_FAIL)) ? ESP_ERR_INVALID_STATE : ESP_OK;
 }
 
 //Porcelain to do one blocking transmission.
@@ -1461,19 +1472,8 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_end(spi_device_handle_t handle,
             return ESP_ERR_TIMEOUT;
         }
     }
-
-#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE   //invalidate here to let user access rx data in post_cb if possible
-    const spi_bus_attr_t *bus_attr = host->bus_attr;
-    if (bus_attr->dma_enabled && host->cur_trans_buf.buffer_to_rcv) {
-        uint16_t alignment = bus_attr->internal_mem_align_size;
-        uint32_t buffer_byte_len = (host->cur_trans_buf.trans->rxlength + 7) / 8;
-        buffer_byte_len = (buffer_byte_len + alignment - 1) & (~(alignment - 1));
-        esp_err_t ret = esp_cache_msync((void *)host->cur_trans_buf.buffer_to_rcv, buffer_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
-        if (ret != ESP_OK) {
-            return ret;
-        }
-    }
-#endif
+    spi_trans_dma_error_check(host);
+    uint32_t trans_flags = host->cur_trans_buf.trans->flags;  // save the flags before bus_lock release
 
     ESP_LOGV(SPI_TAG, "polling trans done");
     //deal with the in-flight transaction
@@ -1490,7 +1490,7 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_end(spi_device_handle_t handle,
         spi_bus_lock_acquire_end(handle->dev_lock);
     }
 
-    return ESP_OK;
+    return (trans_flags & (SPI_TRANS_DMA_RX_FAIL | SPI_TRANS_DMA_TX_FAIL)) ? ESP_ERR_INVALID_STATE : ESP_OK;
 }
 
 esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_transmit(spi_device_handle_t handle, spi_transaction_t* trans_desc)
@@ -1829,20 +1829,16 @@ esp_err_t SPI_MASTER_ATTR spi_device_queue_multi_trans(spi_device_handle_t handl
     SPI_CHECK(handle, "Invalid arguments.", ESP_ERR_INVALID_ARG);
     SPI_CHECK(SOC_SPI_SCT_SUPPORTED_PERIPH(handle->host->id), "Invalid arguments", ESP_ERR_INVALID_ARG);
     SPI_CHECK(handle->host->sct_mode_enabled == 1, "SCT mode isn't enabled", ESP_ERR_INVALID_STATE);
+
     esp_err_t ret = ESP_OK;
-
-    uint16_t alignment = handle->host->bus_attr->internal_mem_align_size;
-    uint32_t *conf_buffer = heap_caps_aligned_alloc(alignment, (trans_num * SOC_SPI_SCT_BUFFER_NUM_MAX * sizeof(uint32_t)), MALLOC_CAP_DMA);
-    SPI_CHECK(conf_buffer, "No enough memory", ESP_ERR_NO_MEM);
-
     for (int i = 0; i < trans_num; i++) {
-        ret = check_trans_valid(handle, (spi_transaction_t *)&seg_trans_desc[i]);
-        if (ret != ESP_OK) {
-            return ret;
-        }
+        ESP_RETURN_ON_ERROR(check_trans_valid(handle, (spi_transaction_t *)&seg_trans_desc[i]), SPI_TAG, "Invalid transaction");
     }
     SPI_CHECK(!spi_bus_device_is_polling(handle), "Cannot queue new transaction while previous polling transaction is not terminated.", ESP_ERR_INVALID_STATE);
 
+    uint32_t *conf_buffer = heap_caps_malloc(trans_num * SOC_SPI_SCT_BUFFER_NUM_MAX * sizeof(uint32_t), MALLOC_CAP_DMA);
+    SPI_CHECK(conf_buffer, "No enough memory", ESP_ERR_NO_MEM);
+
     spi_hal_context_t *hal = &handle->host->hal;
     s_sct_init_conf_buffer(hal, conf_buffer, trans_num);
 
diff --git a/components/esp_driver_spi/src/gpspi/spi_slave.c b/components/esp_driver_spi/src/gpspi/spi_slave.c
index 799a9d47a4e..52a1652ad07 100644
--- a/components/esp_driver_spi/src/gpspi/spi_slave.c
+++ b/components/esp_driver_spi/src/gpspi/spi_slave.c
@@ -61,8 +61,7 @@ typedef struct {
 typedef struct {
     int id;
     _Atomic spi_bus_fsm_t fsm;
-    uint64_t gpio_reserve;
-    spi_bus_config_t bus_config;
+    spi_bus_attr_t* bus_attr;
     spi_dma_ctx_t   *dma_ctx;
     spi_slave_interface_config_t cfg;
     intr_handle_t intr;
@@ -181,8 +180,8 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
         goto cleanup;
     }
     memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
-    memcpy(&spihost[host]->bus_config, bus_config, sizeof(spi_bus_config_t));
     spihost[host]->id = host;
+    spihost[host]->bus_attr = (spi_bus_attr_t *)spi_bus_get_attr(host);
     atomic_store(&spihost[host]->fsm, SPI_BUS_FSM_ENABLED);
     spi_slave_hal_context_t *hal = &spihost[host]->hal;
 
@@ -213,17 +212,18 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
         spihost[host]->max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE;
     }
 
-    err = spicommon_bus_initialize_io(host, bus_config, SPICOMMON_BUSFLAG_SLAVE | bus_config->flags, &spihost[host]->flags, &spihost[host]->gpio_reserve);
+    err = spicommon_bus_initialize_io(host, bus_config, SPICOMMON_BUSFLAG_SLAVE | bus_config->flags, NULL, NULL);
     if (err != ESP_OK) {
         ret = err;
         goto cleanup;
     }
     if (slave_config->spics_io_num >= 0) {
-        spicommon_cs_initialize(host, slave_config->spics_io_num, 0, !bus_is_iomux(spihost[host]), &spihost[host]->gpio_reserve);
+        spicommon_cs_initialize(host, slave_config->spics_io_num, 0, !bus_is_iomux(spihost[host]), NULL);
         // check and save where cs line really route through
         spihost[host]->cs_iomux = (slave_config->spics_io_num == spi_periph_signal[host].spics0_iomux_pin) && bus_is_iomux(spihost[host]);
         spihost[host]->cs_in_signal = spi_periph_signal[host].spics_in;
     }
+    spihost[host]->flags = spihost[host]->bus_attr->flags; // This flag MUST be set after spicommon_bus_initialize_io is called
 
     // The slave DMA suffers from unexpected transactions. Forbid reading if DMA is enabled by disabling the CS line.
     if (spihost[host]->dma_enabled) {
@@ -337,9 +337,9 @@ esp_err_t spi_slave_free(spi_host_device_t host)
         free(spihost[host]->dma_ctx->dmadesc_rx);
         spicommon_dma_chan_free(spihost[host]->dma_ctx);
     }
-    spicommon_bus_free_io_cfg(&spihost[host]->bus_config, &spihost[host]->gpio_reserve);
+    spicommon_bus_free_io_cfg(&spihost[host]->bus_attr->bus_cfg, &spihost[host]->bus_attr->gpio_reserve);
     if (spihost[host]->cfg.spics_io_num >= 0) {
-        spicommon_cs_free_io(spihost[host]->cfg.spics_io_num, &spihost[host]->gpio_reserve);
+        spicommon_cs_free_io(spihost[host]->cfg.spics_io_num, &spihost[host]->bus_attr->gpio_reserve);
     }
     esp_intr_free(spihost[host]->intr);
 
diff --git a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c
index b9f5222218c..6c831f89b98 100644
--- a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c
+++ b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c
@@ -44,9 +44,8 @@ typedef struct {
 
 typedef struct {
     spi_host_device_t host_id;
-    spi_bus_config_t bus_config;
     int cs_io_num;
-    uint64_t gpio_reserve;
+    spi_bus_attr_t* bus_attr;
     _Atomic spi_bus_fsm_t fsm;
     spi_dma_ctx_t   *dma_ctx;
     uint16_t internal_mem_align_size;
@@ -129,7 +128,7 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
     host->int_spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
     host->append_mode = append_mode;
     atomic_store(&host->fsm, SPI_BUS_FSM_ENABLED);
-    memcpy(&host->bus_config, bus_config, sizeof(spi_bus_config_t));
+    host->bus_attr = (spi_bus_attr_t *)spi_bus_get_attr(host_id);
     host->cs_io_num = config->spics_io_num;
 
     ret = spicommon_dma_chan_alloc(host_id, config->dma_chan, &host->dma_ctx);
@@ -172,11 +171,12 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
     host->internal_mem_align_size = 4;
 #endif
 
-    ret = spicommon_bus_initialize_io(host_id, bus_config, SPICOMMON_BUSFLAG_SLAVE | bus_config->flags, &host->flags, &host->gpio_reserve);
+    ret = spicommon_bus_initialize_io(host_id, bus_config, SPICOMMON_BUSFLAG_SLAVE | bus_config->flags, NULL, NULL);
     if (ret != ESP_OK) {
         goto cleanup;
     }
-    spicommon_cs_initialize(host_id, config->spics_io_num, 0, !(bus_config->flags & SPICOMMON_BUSFLAG_NATIVE_PINS), &host->gpio_reserve);
+    spicommon_cs_initialize(host_id, config->spics_io_num, 0, !(bus_config->flags & SPICOMMON_BUSFLAG_NATIVE_PINS), NULL);
+    host->flags = host->bus_attr->flags; // This flag MUST be set after spicommon_bus_initialize_io is called
 
     spi_slave_hd_hal_config_t hal_config = {
         .host_id = host_id,
@@ -349,8 +349,8 @@ esp_err_t spi_slave_hd_deinit(spi_host_device_t host_id)
     }
 #endif
 
-    spicommon_bus_free_io_cfg(&host->bus_config, &host->gpio_reserve);
-    spicommon_cs_free_io(host->cs_io_num, &host->gpio_reserve);
+    spicommon_bus_free_io_cfg(&host->bus_attr->bus_cfg, &host->bus_attr->gpio_reserve);
+    spicommon_cs_free_io(host->cs_io_num, &host->bus_attr->gpio_reserve);
     spicommon_bus_free(host_id);
     free(host->dma_ctx->dmadesc_tx);
     free(host->dma_ctx->dmadesc_rx);
diff --git a/components/esp_driver_spi/test_apps/master/CMakeLists.txt b/components/esp_driver_spi/test_apps/master/CMakeLists.txt
index 4a70a2fcb7f..2e70b27cf53 100644
--- a/components/esp_driver_spi/test_apps/master/CMakeLists.txt
+++ b/components/esp_driver_spi/test_apps/master/CMakeLists.txt
@@ -9,19 +9,28 @@ project(spi_master_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/spi_master_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(SPI_MASTER_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpspi
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${SPI_MASTER_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file ${CMAKE_BINARY_DIR}/spi_master_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()
 
 message(STATUS "Checking spi registers are not read-write by half-word")
 include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
-check_register_rw_half_word(SOC_MODULES "spi" "syscon" "pcr" "system" "hp_sys_clkrst"
-                            HAL_MODULES "spi")
+check_register_rw_half_word(
+    SOC_MODULES "spi" "syscon" "pcr" "system" "hp_sys_clkrst"
+    HAL_MODULES "spi"
+)
diff --git a/components/esp_driver_spi/test_apps/master/main/CMakeLists.txt b/components/esp_driver_spi/test_apps/master/main/CMakeLists.txt
index f0d824d614c..91e5f4d0fc4 100644
--- a/components/esp_driver_spi/test_apps/master/main/CMakeLists.txt
+++ b/components/esp_driver_spi/test_apps/master/main/CMakeLists.txt
@@ -16,6 +16,6 @@ endif()
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(
     SRCS ${srcs}
-    PRIV_REQUIRES esp_driver_spi spi_flash esp_timer esp_driver_gpio
+    PRIV_REQUIRES esp_driver_spi spi_flash esp_timer esp_driver_gpio esp_mm
     WHOLE_ARCHIVE
 )
diff --git a/components/esp_driver_spi/test_apps/master/main/test_spi_master.c b/components/esp_driver_spi/test_apps/master/main/test_spi_master.c
index 5351de74cdc..492c771c298 100644
--- a/components/esp_driver_spi/test_apps/master/main/test_spi_master.c
+++ b/components/esp_driver_spi/test_apps/master/main/test_spi_master.c
@@ -25,6 +25,7 @@
 #include "esp_clk_tree.h"
 #include "esp_timer.h"
 #include "esp_log.h"
+#include "esp_cache.h"
 #include "test_utils.h"
 #include "test_spi_utils.h"
 #include "spi_performance.h"
@@ -123,7 +124,7 @@ TEST_CASE("SPI Master clockdiv calculation routines", "[spi]")
 
 // Test All clock source
 #define TEST_CLK_BYTE_LEN           10000
-#define TEST_TRANS_TIME_BIAS_RATIO  (float)5.0/100   // think 5% transfer time bias as acceptable
+#define TEST_TRANS_TIME_BIAS_RATIO  (float)8.0/100   // think 8% transfer time bias as acceptable
 TEST_CASE("SPI Master clk_source and divider accuracy", "[spi]")
 {
     int64_t start = 0, end = 0;
@@ -775,24 +776,27 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
     //connect MOSI to two devices breaks the output, fix it.
     spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
 
-#define TEST_REGION_SIZE 2
+#define TEST_REGION_SIZE 3
     static spi_transaction_t trans[TEST_REGION_SIZE];
-    int x;
     memset(trans, 0, sizeof(trans));
 
-    trans[0].length = 320 * 8,
-            trans[0].tx_buffer = data_malloc + 2;
+    trans[0].length = 320 * 8;
+    trans[0].tx_buffer = data_malloc + 2;
     trans[0].rx_buffer = data_dram;
 
-    trans[1].length = 4 * 8,
-            trans[1].flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA;
+    trans[1].length = 4 * 8;
+    trans[1].flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA;
     uint32_t *ptr = (uint32_t *)trans[1].rx_data;
     *ptr = 0x54545454;
     ptr = (uint32_t *)trans[1].tx_data;
     *ptr = 0xbc124960;
 
+    trans[2].length = 64 * 8;
+    trans[2].tx_buffer = data_drom;
+    trans[2].rx_buffer = data_malloc;
+
     //Queue all transactions.
-    for (x = 0; x < TEST_REGION_SIZE; x++) {
+    for (int x = 0; x < TEST_REGION_SIZE; x++) {
         ESP_LOGI(TAG, "transmitting %d...", x);
         ret = spi_device_transmit(spi, &trans[x]);
         TEST_ASSERT(ret == ESP_OK);
@@ -1723,6 +1727,7 @@ static IRAM_ATTR void test_master_iram(void)
 
     spi_device_handle_t dev_handle = {0};
     spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
+    devcfg.cs_ena_pretrans = 1;
     devcfg.post_cb = test_master_iram_post_trans_cbk;
     TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &dev_handle));
 
@@ -1967,3 +1972,100 @@ TEST_CASE("test_spi_master_auto_sleep_retention", "[spi]")
 }
 #endif  //CONFIG_PM_ENABLE
 #endif  //SOC_LIGHT_SLEEP_SUPPORTED
+
+#if CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE
+#define TEST_EDMA_PSRAM_TRANS_NUM    5
+#define TEST_EDMA_TRANS_LEN          20000
+#define TEST_EDMA_BUFFER_SZ          (TEST_EDMA_PSRAM_TRANS_NUM * TEST_EDMA_TRANS_LEN)
+
+void test_spi_psram_trans(spi_device_handle_t dev_handle, void *tx, void *rx)
+{
+    spi_transaction_t trans_cfg = {
+        .tx_buffer = tx,
+        .rx_buffer = rx,
+    };
+
+    int trans_len = TEST_EDMA_TRANS_LEN - TEST_EDMA_PSRAM_TRANS_NUM / 2;
+    for (uint8_t cnt = 0; cnt < TEST_EDMA_PSRAM_TRANS_NUM; cnt ++) {
+        trans_cfg.length = trans_len * 8;
+        trans_cfg.rxlength = trans_len * 8;
+        trans_cfg.flags = (cnt % 2) ? 0 : SPI_TRANS_DMA_USE_PSRAM;
+
+        // To use psram, hardware will pass data through MSPI and GDMA to GPSPI, which need some time
+        // GPSPI bandwidth(speed * line_num) should always no more than PSRAM bandwidth
+        trans_cfg.override_freq_hz = (CONFIG_SPIRAM_SPEED / 4) * 1000 * 1000;
+        printf("%d TX %p RX %p len %d @%ld kHz\n", cnt, trans_cfg.tx_buffer, trans_cfg.rx_buffer, trans_len, trans_cfg.override_freq_hz / 1000);
+        TEST_ESP_OK(spi_device_transmit(dev_handle, &trans_cfg));
+        TEST_ASSERT(!(trans_cfg.flags & (SPI_TRANS_DMA_RX_FAIL | SPI_TRANS_DMA_TX_FAIL)));
+        spitest_cmp_or_dump(trans_cfg.tx_buffer, trans_cfg.rx_buffer, trans_len);
+        trans_cfg.tx_buffer += trans_len;
+        trans_cfg.rx_buffer += trans_len;
+        trans_len ++;
+    }
+}
+
+TEST_CASE("SPI_Master: PSRAM buffer transaction via EDMA", "[spi]")
+{
+    spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
+    buscfg.miso_io_num = buscfg.mosi_io_num;    // set spi "self-loopback"
+    buscfg.max_transfer_sz = TEST_EDMA_BUFFER_SZ;
+    TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
+
+    spi_device_handle_t dev_handle = NULL;
+    spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
+    devcfg.clock_speed_hz = 80 * 1000 * 1000;   // Test error case on highest freq first
+    TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &dev_handle));
+    int real_freq_khz;
+    spi_device_get_actual_freq(dev_handle, &real_freq_khz);
+
+    uint8_t *internal_1 = heap_caps_calloc(1, TEST_EDMA_BUFFER_SZ, MALLOC_CAP_INTERNAL);
+    uint8_t *external_1 = heap_caps_calloc(1, TEST_EDMA_BUFFER_SZ, MALLOC_CAP_SPIRAM);
+    uint8_t *external_2 = heap_caps_calloc(1, TEST_EDMA_BUFFER_SZ, MALLOC_CAP_SPIRAM);
+    test_fill_random_to_buffers_dualboard(1001, internal_1, external_2, TEST_EDMA_BUFFER_SZ);
+
+    printf("Test error case: High freq @%d kHz\n", real_freq_khz);
+    spi_transaction_t trans_cfg = {
+        .length = TEST_EDMA_TRANS_LEN * 8,
+        .tx_buffer = external_2,
+        .rx_buffer = external_1,
+    };
+
+    // also test on polling API, and automalloc mechanism
+    for (uint8_t i = 0; i < 2; i++) {
+        printf("\n==== %s ====\n", i ? "EDMA" : "Auto Malloc");
+        trans_cfg.flags = i ? SPI_TRANS_DMA_USE_PSRAM : 0;
+        uint32_t before = esp_get_free_heap_size();
+        spi_device_polling_start(dev_handle, &trans_cfg, portMAX_DELAY);
+        uint32_t after = esp_get_free_heap_size();
+        printf("mem_diff: %ld, trans_len: %d\n", after - before, TEST_EDMA_TRANS_LEN);
+        // rx buffer still potential re-malloc from psram even if SPI_TRANS_DMA_USE_PSRAM is set
+        TEST_ASSERT(i ? (before - after) < 2 * TEST_EDMA_TRANS_LEN : (before - after) > 2 * TEST_EDMA_TRANS_LEN);
+        spi_device_polling_end(dev_handle, portMAX_DELAY);
+        printf("TX fail: %d, RX fail: %d\n", !!(trans_cfg.flags & SPI_TRANS_DMA_TX_FAIL), !!(trans_cfg.flags & SPI_TRANS_DMA_RX_FAIL));
+        TEST_ASSERT((!!i) == !!(trans_cfg.flags & (SPI_TRANS_DMA_TX_FAIL | SPI_TRANS_DMA_RX_FAIL)));
+        if (!i) { // data should be correct if using auto malloc
+            spitest_cmp_or_dump(trans_cfg.tx_buffer, trans_cfg.rx_buffer, TEST_EDMA_TRANS_LEN);
+        }
+    }
+
+    printf("\nTest trans: internal -> psram\n");
+    memset(external_1, 0, TEST_EDMA_BUFFER_SZ);
+    TEST_ESP_OK(esp_cache_msync((void *)external_1, TEST_EDMA_BUFFER_SZ, (ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED)));
+    test_spi_psram_trans(dev_handle, internal_1, external_1);
+
+    printf("\nTest trans: psram    -> psram\n");
+    memset(external_2, 0, TEST_EDMA_BUFFER_SZ);
+    TEST_ESP_OK(esp_cache_msync((void *)external_2, TEST_EDMA_BUFFER_SZ, (ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED)));
+    test_spi_psram_trans(dev_handle, external_1, external_2);
+
+    printf("\nTest trans: psram    -> internal\n");
+    memset(internal_1, 0, TEST_EDMA_BUFFER_SZ);
+    test_spi_psram_trans(dev_handle, external_2, internal_1);
+
+    free(internal_1);
+    free(external_1);
+    free(external_2);
+    spi_bus_remove_device(dev_handle);
+    spi_bus_free(TEST_SPI_HOST);
+}
+#endif
diff --git a/components/esp_driver_spi/test_apps/master/main/test_spi_master_sct.c b/components/esp_driver_spi/test_apps/master/main/test_spi_master_sct.c
index f325751eb2e..748173f1689 100644
--- a/components/esp_driver_spi/test_apps/master/main/test_spi_master_sct.c
+++ b/components/esp_driver_spi/test_apps/master/main/test_spi_master_sct.c
@@ -20,7 +20,6 @@
 #include "esp_private/esp_pmu.h"
 #include "driver/spi_slave_hd.h"
 #include "driver/spi_slave.h"
-#include "soc/spi_pins.h"
 #include "test_spi_utils.h"
 
 __attribute__((unused)) static const char *TAG = "SCT";
diff --git a/components/esp_driver_spi/test_apps/master/main/test_spi_sio.c b/components/esp_driver_spi/test_apps/master/main/test_spi_sio.c
index 07c5111995a..0ca09926ada 100644
--- a/components/esp_driver_spi/test_apps/master/main/test_spi_sio.c
+++ b/components/esp_driver_spi/test_apps/master/main/test_spi_sio.c
@@ -140,7 +140,6 @@ TEST_CASE("SPI Single Board Test SIO", "[spi]")
 }
 #endif //#if (TEST_SPI_PERIPH_NUM >= 2)
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)    //IDF-7503 slave support
 /********************************************************************************
  *                             Test SIO Master
  * SIO Slave is not supported, and one unit test is limited to one feature, so,,,
@@ -271,7 +270,7 @@ void test_sio_slave_emulate(bool sio_master_in)
 
     unity_wait_for_signal("Master ready");
     for (int i = 0; i < TEST_NUM; i++) {
-        spi_slave_transaction_t trans = {};
+        spi_slave_transaction_t trans = { .flags = SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO, };
         if (sio_master_in) {
             // slave output only section
             trans.length = (i + 1) * 8 * 8;
@@ -324,4 +323,3 @@ void test_slave_run(void)
 }
 
 TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test_SIO_Mode_Multi_Board", "[spi_ms][test_env=generic_multi_device]", test_master_run, test_slave_run);
-#endif  //p4 slave support
diff --git a/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c5 b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c5
new file mode 100644
index 00000000000..cc641ea6033
--- /dev/null
+++ b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c5
@@ -0,0 +1 @@
+CONFIG_SPIRAM=y
diff --git a/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c61 b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c61
new file mode 100644
index 00000000000..cc641ea6033
--- /dev/null
+++ b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32c61
@@ -0,0 +1 @@
+CONFIG_SPIRAM=y
diff --git a/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32h4 b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32h4
new file mode 100644
index 00000000000..cc641ea6033
--- /dev/null
+++ b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32h4
@@ -0,0 +1 @@
+CONFIG_SPIRAM=y
diff --git a/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32p4 b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32p4
new file mode 100644
index 00000000000..cc641ea6033
--- /dev/null
+++ b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32p4
@@ -0,0 +1 @@
+CONFIG_SPIRAM=y
diff --git a/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32s3 b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32s3
new file mode 100644
index 00000000000..cc641ea6033
--- /dev/null
+++ b/components/esp_driver_spi/test_apps/master/sdkconfig.ci.release.esp32s3
@@ -0,0 +1 @@
+CONFIG_SPIRAM=y
diff --git a/components/esp_driver_spi/test_apps/slave/CMakeLists.txt b/components/esp_driver_spi/test_apps/slave/CMakeLists.txt
index 83e4b2caf09..c8c9712a922 100644
--- a/components/esp_driver_spi/test_apps/slave/CMakeLists.txt
+++ b/components/esp_driver_spi/test_apps/slave/CMakeLists.txt
@@ -9,14 +9,21 @@ project(spi_slave_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/spi_slave_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(SPI_SLAVE_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpspi
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${SPI_SLAVE_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file ${CMAKE_BINARY_DIR}/spi_slave_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()
diff --git a/components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c b/components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c
index 16746967715..1af008387a2 100644
--- a/components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c
+++ b/components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c
@@ -130,6 +130,53 @@ TEST_CASE("test fullduplex slave with only RX direction", "[spi]")
     ESP_LOGI(SLAVE_TAG, "test passed.");
 }
 
+TEST_CASE("test fullduplex slave with only TX direction", "[spi]")
+{
+    custom_setup();
+
+    memcpy(slave_txbuf, slave_send, sizeof(slave_send));
+
+    for (int i = 0; i < 4; i ++) {
+        //slave send
+        spi_slave_transaction_t slave_t;
+        spi_slave_transaction_t *out;
+        memset(&slave_t, 0, sizeof(spi_slave_transaction_t));
+        slave_t.length = 8 * 32;
+        slave_t.tx_buffer = slave_txbuf;
+        slave_t.rx_buffer = NULL;
+        slave_t.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
+
+        // Colorize RX buffer with known pattern
+        memset(master_rxbuf, 0x66, sizeof(master_rxbuf));
+
+        TEST_ESP_OK(spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
+
+        //send
+        spi_transaction_t t = {};
+        t.length = 32 * (i + 1);
+        if (t.length != 0) {
+            t.tx_buffer = NULL;
+            t.rx_buffer = master_rxbuf;
+        }
+        spi_device_transmit(spi, &t);
+
+        //wait for end
+        TEST_ESP_OK(spi_slave_get_trans_result(TEST_SLAVE_HOST, &out, portMAX_DELAY));
+
+        //show result
+        ESP_LOGI(SLAVE_TAG, "trans_len: %d", slave_t.trans_len);
+        ESP_LOG_BUFFER_HEX("master rx", t.rx_buffer, t.length / 8);
+        ESP_LOG_BUFFER_HEX("slave tx", slave_t.tx_buffer, (slave_t.trans_len + 7) / 8);
+
+        TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_t.tx_buffer, t.rx_buffer, t.length / 8);
+        TEST_ASSERT_EQUAL(t.length, slave_t.trans_len);
+    }
+
+    custom_teardown();
+
+    ESP_LOGI(SLAVE_TAG, "test passed.");
+}
+
 #define TEST_SLV_RX_BUF_LEN     15
 TEST_CASE("Test slave rx no_dma overwrite when length below/over config", "[spi]")
 {
@@ -202,53 +249,6 @@ TEST_CASE("Test slave rx no_dma overwrite when length below/over config", "[spi]
     TEST_ESP_OK(spi_bus_remove_device(spidev0));
     TEST_ESP_OK(spi_bus_free(TEST_SPI_HOST));
 }
-
-TEST_CASE("test fullduplex slave with only TX direction", "[spi]")
-{
-    custom_setup();
-
-    memcpy(slave_txbuf, slave_send, sizeof(slave_send));
-
-    for (int i = 0; i < 4; i ++) {
-        //slave send
-        spi_slave_transaction_t slave_t;
-        spi_slave_transaction_t *out;
-        memset(&slave_t, 0, sizeof(spi_slave_transaction_t));
-        slave_t.length = 8 * 32;
-        slave_t.tx_buffer = slave_txbuf;
-        slave_t.rx_buffer = NULL;
-        slave_t.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
-
-        // Colorize RX buffer with known pattern
-        memset(master_rxbuf, 0x66, sizeof(master_rxbuf));
-
-        TEST_ESP_OK(spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
-
-        //send
-        spi_transaction_t t = {};
-        t.length = 32 * (i + 1);
-        if (t.length != 0) {
-            t.tx_buffer = NULL;
-            t.rx_buffer = master_rxbuf;
-        }
-        spi_device_transmit(spi, &t);
-
-        //wait for end
-        TEST_ESP_OK(spi_slave_get_trans_result(TEST_SLAVE_HOST, &out, portMAX_DELAY));
-
-        //show result
-        ESP_LOGI(SLAVE_TAG, "trans_len: %d", slave_t.trans_len);
-        ESP_LOG_BUFFER_HEX("master rx", t.rx_buffer, t.length / 8);
-        ESP_LOG_BUFFER_HEX("slave tx", slave_t.tx_buffer, (slave_t.trans_len + 7) / 8);
-
-        TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_t.tx_buffer, t.rx_buffer, t.length / 8);
-        TEST_ASSERT_EQUAL(t.length, slave_t.trans_len);
-    }
-
-    custom_teardown();
-
-    ESP_LOGI(SLAVE_TAG, "test passed.");
-}
 #endif // !CONFIG_SPIRAM
 #endif // #if (TEST_SPI_PERIPH_NUM >= 2)
 
@@ -312,6 +312,7 @@ static void test_slave_iram_master_normal(void)
 
     spi_device_handle_t dev_handle = {0};
     spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
+    devcfg.cs_ena_pretrans = 1;
     TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &dev_handle));
 
     uint8_t *master_send = heap_caps_malloc(TEST_BUFFER_SZ, MALLOC_CAP_DMA);
diff --git a/components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c b/components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c
index 52967059eef..0f802990977 100644
--- a/components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c
+++ b/components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c
@@ -17,7 +17,6 @@
 #include "driver/spi_slave.h"
 #include "esp_private/spi_slave_internal.h"
 #include "soc/spi_pins.h"
-#include "soc/spi_periph.h"
 
 #define TEST_BUF_SIZE    32
 #define TEST_TIMES       4
diff --git a/components/esp_hal_ana_conv/include/hal/adc_hal.h b/components/esp_hal_ana_conv/include/hal/adc_hal.h
index 66b363c6031..521914698a4 100644
--- a/components/esp_hal_ana_conv/include/hal/adc_hal.h
+++ b/components/esp_hal_ana_conv/include/hal/adc_hal.h
@@ -15,11 +15,6 @@
 #include "hal/adc_ll.h"
 #endif
 
-#if SOC_IS(ESP32S2)
-//ADC utilises SPI3 DMA on ESP32S2
-#include "hal/spi_ll.h"
-#endif
-
 #if SOC_IS(ESP32)
 //ADC utilises I2S0 DMA on ESP32
 #include "hal/i2s_ll.h"
diff --git a/components/esp_hal_gpspi/CMakeLists.txt b/components/esp_hal_gpspi/CMakeLists.txt
new file mode 100644
index 00000000000..99e19773ee4
--- /dev/null
+++ b/components/esp_hal_gpspi/CMakeLists.txt
@@ -0,0 +1,29 @@
+idf_build_get_property(target IDF_TARGET)
+
+set(srcs)
+set(includes "include")
+
+if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
+    list(APPEND includes "${target}/include")
+endif()
+
+if(CONFIG_SOC_GPSPI_SUPPORTED)
+    list(APPEND srcs
+        "${target}/spi_periph.c"
+        "spi_hal.c"
+        "spi_hal_iram.c"
+        "spi_slave_hal.c"
+        "spi_slave_hal_iram.c"
+    )
+
+    if(CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2)
+        list(APPEND srcs "spi_slave_hd_hal.c")
+    endif()
+endif()
+
+idf_component_register(
+    SRCS ${srcs}
+    INCLUDE_DIRS ${includes}
+    REQUIRES soc hal
+    PRIV_REQUIRES esp_hal_gpio
+)
diff --git a/components/esp_hal_gpspi/README.md b/components/esp_hal_gpspi/README.md
new file mode 100644
index 00000000000..cab83a116fa
--- /dev/null
+++ b/components/esp_hal_gpspi/README.md
@@ -0,0 +1,69 @@
+# ESP Hardware Abstraction Layer for SPI Peripheral
+
+> [!NOTE]
+> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
+
+## Overview
+
+The `esp_hal_spi` component provides a **Hardware Abstraction Layer** for the General Purpose SPI (GPSPI) peripherals across all ESP-IDF supported targets. It serves as a foundation for the higher-level SPI drivers, offering a consistent interface to interact with SPI hardware while hiding the complexities of chip-specific implementations.
+
+## Architecture
+
+The HAL architecture consists of two primary layers:
+
+1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with SPI peripherals, including:
+   - Initialization and de-initialization
+   - Clock configuration and timing calculations
+   - Device and transaction setup
+   - Master, slave, and slave HD (Half Duplex) mode operations
+
+2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
+   - Register access abstractions
+   - Chip-specific register configurations
+   - Hardware feature compatibility
+
+## Features
+
+- Unified SPI interface across all ESP chip families
+- Support for multiple operation modes:
+  - **Master mode**: Full-duplex and half-duplex communication
+  - **Slave mode**: Standard slave operation
+  - **Slave HD mode**: Half Duplex slave mode with segment-based transactions (on supported chips)
+- Flexible SPI line configurations (1/2/4-line modes)
+- Configurable clock sources and frequency settings
+- Support for various transaction formats (command, address, dummy, data phases)
+
+## Usage
+
+This component is primarily used by ESP-IDF peripheral drivers such as `esp_driver_spi`. It provides the low-level hardware abstraction needed for SPI communication with external devices.
+
+For advanced developers implementing custom SPI solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
+
+### Typical Usage Flow
+
+**Master Mode (without DMA):**
+1. Initialize the SPI bus
+2. Setup clock speed configuration
+3. Call `setup_device` to update parameters for a specific device
+4. Call `setup_trans` to update parameters for a specific transaction
+5. Prepare data to send into hardware registers
+6. Trigger the SPI transaction to start
+7. Wait until the transaction is complete
+8. Fetch the received data
+
+**Slave Mode (without DMA):**
+1. Initialize the SPI bus with `spi_slave_hal_init`
+2. Configure device parameters (mode, bit order, etc.) in the HAL context
+3. Call `spi_slave_hal_setup_device` to update parameters for the device
+4. Prepare data to send and receiving buffer
+5. Call `spi_slave_hal_set_trans_bitlen` to set transaction bit length
+6. Call `spi_slave_hal_user_start` to trigger the SPI transaction to start
+7. Wait until the transaction is done with `spi_slave_hal_usr_is_done`
+8. Call `spi_slave_hal_store_result` to store the received data
+9. Call `spi_slave_hal_get_rcv_bitlen` to get the received data length
+
+## Dependencies
+
+- `soc`: Provides chip-specific register definitions
+- `hal`: Core hardware abstraction utilities and macros
+- `esp_hal_gpio`: Required for ESP32 to access GPIO matrix delay information
diff --git a/components/hal/esp32/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32/include/hal/spi_ll.h
similarity index 98%
rename from components/hal/esp32/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32/include/hal/spi_ll.h
index 13ac1afc277..8685e5312d4 100644
--- a/components/hal/esp32/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32/include/hal/spi_ll.h
@@ -18,7 +18,7 @@
 #include <stdlib.h> //for abs()
 #include "esp_types.h"
 #include "esp32/rom/lldesc.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/dport_reg.h"
 #include "hal/misc.h"
@@ -1184,6 +1184,19 @@ static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32
     dma_in->dma_conf.indscr_burst_en = enable;
 }
 
+/**
+ * Get the DMA RX alignment requirements
+ *
+ * @param dma_dev Beginning address of the DMA peripheral registers.
+ * @param internal_size The internal memory alignment requirements.
+ * @param external_size The external memory alignment requirements.
+ */
+static inline void spi_dma_ll_get_rx_alignment_require(spi_dma_dev_t *dma_dev, uint32_t *internal_size, uint32_t *external_size)
+{
+    *internal_size = 4;     // esp32 needs 4 bytes alignment on hardware design
+    *external_size = UINT32_MAX;    // dma of esp32 spi don't support external memory
+}
+
 /**
  * Reset TX DMA which transmits the data from RAM to a peripheral.
  *
diff --git a/components/hal/esp32/include/hal/spi_types.h b/components/esp_hal_gpspi/esp32/include/hal/spi_types.h
similarity index 100%
rename from components/hal/esp32/include/hal/spi_types.h
rename to components/esp_hal_gpspi/esp32/include/hal/spi_types.h
diff --git a/components/soc/esp32/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32/include/soc/spi_pins.h
diff --git a/components/soc/esp32/spi_periph.c b/components/esp_hal_gpspi/esp32/spi_periph.c
similarity index 100%
rename from components/soc/esp32/spi_periph.c
rename to components/esp_hal_gpspi/esp32/spi_periph.c
diff --git a/components/hal/esp32c2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32c2/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h
index fef1ff04fc0..bd838e71e69 100644
--- a/components/hal/esp32c2/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h
@@ -18,8 +18,8 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1100,7 +1100,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9,               dma_int_set.cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda,               dma_int_set.cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1287,8 +1286,6 @@ static inline int spi_ll_get_slave_hd_dummy_bits(spi_line_mode_t line_mode)
     return 8;
 }
 
-
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1611,7 +1608,6 @@ static inline void spi_ll_set_magic_number(spi_dev_t *hw, uint8_t magic_value)
     hw->slave.dma_seg_magic_value = magic_value;
 }
 
-
 #undef SPI_LL_RST_MASK
 #undef SPI_LL_UNUSED_INT_MASK
 
diff --git a/components/soc/esp32c2/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32c2/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32c2/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32c2/include/soc/spi_pins.h
diff --git a/components/soc/esp32c2/spi_periph.c b/components/esp_hal_gpspi/esp32c2/spi_periph.c
similarity index 100%
rename from components/soc/esp32c2/spi_periph.c
rename to components/esp_hal_gpspi/esp32c2/spi_periph.c
diff --git a/components/hal/esp32c3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32c3/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h
index 258cc41675c..e1553d16d95 100644
--- a/components/hal/esp32c3/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h
@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
@@ -64,7 +64,6 @@ typedef enum {
     SPI_LL_INTR_SEG_DONE =      BIT(14),
 } spi_ll_intr_t;
 
-
 // Flags for conditions under which the transaction length should be recorded
 typedef enum {
     SPI_LL_TRANS_LEN_COND_WRBUF =   BIT(0), ///< WRBUF length will be recorded
@@ -73,7 +72,6 @@ typedef enum {
     SPI_LL_TRANS_LEN_COND_RDDMA =   BIT(3), ///< RDDMA length will be recorded
 } spi_ll_trans_len_cond_t;
 
-
 // SPI base command in esp32c3
 typedef enum {
     /* Slave HD Only */
@@ -1102,7 +1100,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9=1) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda=1)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
diff --git a/components/soc/esp32c3/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32c3/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32c3/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32c3/include/soc/spi_pins.h
diff --git a/components/soc/esp32c3/spi_periph.c b/components/esp_hal_gpspi/esp32c3/spi_periph.c
similarity index 100%
rename from components/soc/esp32c3/spi_periph.c
rename to components/esp_hal_gpspi/esp32c3/spi_periph.c
diff --git a/components/hal/esp32c5/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h
similarity index 95%
rename from components/hal/esp32c5/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h
index 42006016b79..8ad078822cd 100644
--- a/components/hal/esp32c5/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h
@@ -15,7 +15,7 @@
 #include <stdlib.h> //for abs()
 #include <string.h>
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
@@ -55,6 +55,8 @@ typedef spi_dev_t spi_dma_dev_t;
 // Type definition of all supported interrupts
 typedef enum {
     SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_IN_FULL =       BIT(4),     ///< DMA in_full error happened
+    SPI_LL_INTR_OUT_EMPTY =     BIT(5),     ///< DMA out_empty error happened
     SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
     SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
     SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
@@ -1098,17 +1100,18 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
 //helper macros to generate code for each interrupts
 #define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
 #define INTR_LIST(item)    \
-    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int_ena,         dma_int_raw.trans_done_int_raw,         dma_int_clr.trans_done_int_clr,            dma_int_set.trans_done_int_set) \
-    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int_ena,    dma_int_raw.slv_rd_buf_done_int_raw,    dma_int_clr.slv_rd_buf_done_int_clr,       dma_int_set.slv_rd_buf_done_int_set) \
-    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int_ena,    dma_int_raw.slv_wr_buf_done_int_raw,    dma_int_clr.slv_wr_buf_done_int_clr,       dma_int_set.slv_wr_buf_done_int_set) \
-    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int_ena,    dma_int_raw.slv_rd_dma_done_int_raw,    dma_int_clr.slv_rd_dma_done_int_clr,       dma_int_set.slv_rd_dma_done_int_set) \
-    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int_ena,    dma_int_raw.slv_wr_dma_done_int_raw,    dma_int_clr.slv_wr_dma_done_int_clr,       dma_int_set.slv_wr_dma_done_int_set) \
-    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int_ena, dma_int_raw.dma_seg_trans_done_int_raw, dma_int_clr.dma_seg_trans_done_int_clr,    dma_int_set.dma_seg_trans_done_int_set) \
-    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int_ena,           dma_int_raw.slv_cmd7_int_raw,           dma_int_clr.slv_cmd7_int_clr,              dma_int_set.slv_cmd7_int_set) \
-    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int_ena,           dma_int_raw.slv_cmd8_int_raw,           dma_int_clr.slv_cmd8_int_clr,              dma_int_set.slv_cmd8_int_set) \
-    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
-    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
-
+    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int_ena,             dma_int_raw.trans_done_int_raw,             dma_int_clr.trans_done_int_clr,             dma_int_set.trans_done_int_set) \
+    item(SPI_LL_INTR_IN_FULL,       dma_int_ena.dma_infifo_full_err_int_ena,    dma_int_raw.dma_infifo_full_err_int_raw,    dma_int_clr.dma_infifo_full_err_int_clr,    dma_int_set.dma_infifo_full_err_int_set) \
+    item(SPI_LL_INTR_OUT_EMPTY,     dma_int_ena.dma_outfifo_empty_err_int_ena,  dma_int_raw.dma_outfifo_empty_err_int_raw,  dma_int_clr.dma_outfifo_empty_err_int_clr,  dma_int_set.dma_outfifo_empty_err_int_set) \
+    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int_ena,        dma_int_raw.slv_rd_buf_done_int_raw,        dma_int_clr.slv_rd_buf_done_int_clr,        dma_int_set.slv_rd_buf_done_int_set) \
+    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int_ena,        dma_int_raw.slv_wr_buf_done_int_raw,        dma_int_clr.slv_wr_buf_done_int_clr,        dma_int_set.slv_wr_buf_done_int_set) \
+    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int_ena,        dma_int_raw.slv_rd_dma_done_int_raw,        dma_int_clr.slv_rd_dma_done_int_clr,        dma_int_set.slv_rd_dma_done_int_set) \
+    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int_ena,        dma_int_raw.slv_wr_dma_done_int_raw,        dma_int_clr.slv_wr_dma_done_int_clr,        dma_int_set.slv_wr_dma_done_int_set) \
+    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int_ena,     dma_int_raw.dma_seg_trans_done_int_raw,     dma_int_clr.dma_seg_trans_done_int_clr,     dma_int_set.dma_seg_trans_done_int_set) \
+    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int_ena,               dma_int_raw.slv_cmd7_int_raw,               dma_int_clr.slv_cmd7_int_clr,               dma_int_set.slv_cmd7_int_set) \
+    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int_ena,               dma_int_raw.slv_cmd8_int_raw,               dma_int_clr.slv_cmd8_int_clr,               dma_int_set.slv_cmd8_int_set) \
+    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,               dma_int_raw.slv_cmd9_int_raw,               dma_int_clr.slv_cmd9_int_clr,               dma_int_set.slv_cmd9_int_set) \
+    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,               dma_int_raw.slv_cmda_int_raw,               dma_int_clr.slv_cmda_int_clr,               dma_int_set.slv_cmda_int_set)
 
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
diff --git a/components/soc/esp32c5/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32c5/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32c5/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32c5/include/soc/spi_pins.h
diff --git a/components/soc/esp32c5/spi_periph.c b/components/esp_hal_gpspi/esp32c5/spi_periph.c
similarity index 100%
rename from components/soc/esp32c5/spi_periph.c
rename to components/esp_hal_gpspi/esp32c5/spi_periph.c
diff --git a/components/hal/esp32c6/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32c6/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h
index 3d16b5d7d2f..8e4212fa3a3 100644
--- a/components/hal/esp32c6/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h
@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1085,7 +1085,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9,           dma_int_raw.slv_cmd9,           dma_int_clr.slv_cmd9,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda,           dma_int_raw.slv_cmda,           dma_int_clr.slv_cmda,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1186,7 +1185,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.slv_last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
diff --git a/components/soc/esp32c6/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32c6/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32c6/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32c6/include/soc/spi_pins.h
diff --git a/components/soc/esp32c6/spi_periph.c b/components/esp_hal_gpspi/esp32c6/spi_periph.c
similarity index 100%
rename from components/soc/esp32c6/spi_periph.c
rename to components/esp_hal_gpspi/esp32c6/spi_periph.c
diff --git a/components/hal/esp32c61/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h
similarity index 96%
rename from components/hal/esp32c61/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h
index b2304f1b902..404a2ce126b 100644
--- a/components/hal/esp32c61/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h
@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -55,6 +55,8 @@ typedef spi_dev_t spi_dma_dev_t;
 // Type definition of all supported interrupts
 typedef enum {
     SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_IN_FULL =       BIT(4),     ///< DMA in_full error happened
+    SPI_LL_INTR_OUT_EMPTY =     BIT(5),     ///< DMA out_empty error happened
     SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
     SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
     SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
@@ -1098,17 +1100,18 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
 //helper macros to generate code for each interrupts
 #define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
 #define INTR_LIST(item)    \
-    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done,         dma_int_raw.trans_done,         dma_int_clr.trans_done,            dma_int_set.trans_done) \
-    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done,    dma_int_raw.slv_rd_buf_done,    dma_int_clr.slv_rd_buf_done,       dma_int_set.slv_rd_buf_done) \
-    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done,    dma_int_raw.slv_wr_buf_done,    dma_int_clr.slv_wr_buf_done,       dma_int_set.slv_wr_buf_done) \
-    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done,    dma_int_raw.slv_rd_dma_done,    dma_int_clr.slv_rd_dma_done,       dma_int_set.slv_rd_dma_done) \
-    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done,    dma_int_raw.slv_wr_dma_done,    dma_int_clr.slv_wr_dma_done,       dma_int_set.slv_wr_dma_done) \
-    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done, dma_int_raw.dma_seg_trans_done, dma_int_clr.dma_seg_trans_done,    dma_int_set.dma_seg_trans_done) \
-    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7,           dma_int_raw.slv_cmd7,           dma_int_clr.slv_cmd7,              dma_int_set.slv_cmd7) \
-    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8,           dma_int_raw.slv_cmd8,           dma_int_clr.slv_cmd8,              dma_int_set.slv_cmd8) \
-    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9,           dma_int_raw.slv_cmd9,           dma_int_clr.slv_cmd9,              dma_int_set.slv_cmd9) \
-    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda,           dma_int_raw.slv_cmda,           dma_int_clr.slv_cmda,              dma_int_set.slv_cmda)
-
+    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done,             dma_int_raw.trans_done,             dma_int_clr.trans_done,             dma_int_set.trans_done) \
+    item(SPI_LL_INTR_IN_FULL,       dma_int_ena.dma_infifo_full_err,    dma_int_raw.dma_infifo_full_err,    dma_int_clr.dma_infifo_full_err,    dma_int_set.dma_infifo_full_err) \
+    item(SPI_LL_INTR_OUT_EMPTY,     dma_int_ena.dma_outfifo_empty_err,  dma_int_raw.dma_outfifo_empty_err,  dma_int_clr.dma_outfifo_empty_err,  dma_int_set.dma_outfifo_empty_err) \
+    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done,        dma_int_raw.slv_rd_buf_done,        dma_int_clr.slv_rd_buf_done,        dma_int_set.slv_rd_buf_done) \
+    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done,        dma_int_raw.slv_wr_buf_done,        dma_int_clr.slv_wr_buf_done,        dma_int_set.slv_wr_buf_done) \
+    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done,        dma_int_raw.slv_rd_dma_done,        dma_int_clr.slv_rd_dma_done,        dma_int_set.slv_rd_dma_done) \
+    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done,        dma_int_raw.slv_wr_dma_done,        dma_int_clr.slv_wr_dma_done,        dma_int_set.slv_wr_dma_done) \
+    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done,     dma_int_raw.dma_seg_trans_done,     dma_int_clr.dma_seg_trans_done,     dma_int_set.dma_seg_trans_done) \
+    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7,               dma_int_raw.slv_cmd7,               dma_int_clr.slv_cmd7,               dma_int_set.slv_cmd7) \
+    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8,               dma_int_raw.slv_cmd8,               dma_int_clr.slv_cmd8,               dma_int_set.slv_cmd8) \
+    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9,               dma_int_raw.slv_cmd9,               dma_int_clr.slv_cmd9,               dma_int_set.slv_cmd9) \
+    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda,               dma_int_raw.slv_cmda,               dma_int_clr.slv_cmda,               dma_int_set.slv_cmda)
 
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
diff --git a/components/soc/esp32c61/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32c61/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32c61/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32c61/include/soc/spi_pins.h
diff --git a/components/soc/esp32c61/spi_periph.c b/components/esp_hal_gpspi/esp32c61/spi_periph.c
similarity index 100%
rename from components/soc/esp32c61/spi_periph.c
rename to components/esp_hal_gpspi/esp32c61/spi_periph.c
diff --git a/components/hal/esp32h2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32h2/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h
index 5f7cca1d98f..9af0a43ea31 100644
--- a/components/hal/esp32h2/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h
@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/chip_revision.h"
 #include "soc/pcr_struct.h"
@@ -1087,7 +1087,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1188,7 +1187,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.slv_last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1516,7 +1514,6 @@ static inline void spi_ll_set_magic_number(spi_dev_t *hw, uint8_t magic_value)
     hw->slave.dma_seg_magic_value = magic_value;
 }
 
-
 #undef SPI_LL_RST_MASK
 #undef SPI_LL_UNUSED_INT_MASK
 
diff --git a/components/soc/esp32h2/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32h2/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32h2/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32h2/include/soc/spi_pins.h
diff --git a/components/soc/esp32h2/spi_periph.c b/components/esp_hal_gpspi/esp32h2/spi_periph.c
similarity index 100%
rename from components/soc/esp32h2/spi_periph.c
rename to components/esp_hal_gpspi/esp32h2/spi_periph.c
diff --git a/components/hal/esp32h21/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32h21/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h
index d2ae13d544d..4ccbabfc2da 100644
--- a/components/hal/esp32h21/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h
@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/chip_revision.h"
 #include "soc/pcr_struct.h"
@@ -1073,7 +1073,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
diff --git a/components/soc/esp32h21/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32h21/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32h21/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32h21/include/soc/spi_pins.h
diff --git a/components/soc/esp32h21/spi_periph.c b/components/esp_hal_gpspi/esp32h21/spi_periph.c
similarity index 100%
rename from components/soc/esp32h21/spi_periph.c
rename to components/esp_hal_gpspi/esp32h21/spi_periph.c
diff --git a/components/hal/esp32h4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h
similarity index 95%
rename from components/hal/esp32h4/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h
index a198b6342be..06d8a8fe75e 100644
--- a/components/hal/esp32h4/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h
@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -55,6 +55,8 @@ typedef spi_dev_t spi_dma_dev_t;
 // Type definition of all supported interrupts
 typedef enum {
     SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_IN_FULL =       BIT(4),     ///< DMA in_full error happened
+    SPI_LL_INTR_OUT_EMPTY =     BIT(5),     ///< DMA out_empty error happened
     SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
     SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
     SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
@@ -1120,17 +1122,18 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
 //helper macros to generate code for each interrupts
 #define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
 #define INTR_LIST(item)    \
-    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int_ena,         dma_int_raw.trans_done_int_raw,         dma_int_clr.trans_done_int_clr,            dma_int_set.trans_done_int_set) \
-    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int_ena,    dma_int_raw.slv_rd_buf_done_int_raw,    dma_int_clr.slv_rd_buf_done_int_clr,       dma_int_set.slv_rd_buf_done_int_set) \
-    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int_ena,    dma_int_raw.slv_wr_buf_done_int_raw,    dma_int_clr.slv_wr_buf_done_int_clr,       dma_int_set.slv_wr_buf_done_int_set) \
-    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int_ena,    dma_int_raw.slv_rd_dma_done_int_raw,    dma_int_clr.slv_rd_dma_done_int_clr,       dma_int_set.slv_rd_dma_done_int_set) \
-    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int_ena,    dma_int_raw.slv_wr_dma_done_int_raw,    dma_int_clr.slv_wr_dma_done_int_clr,       dma_int_set.slv_wr_dma_done_int_set) \
-    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int_ena, dma_int_raw.dma_seg_trans_done_int_raw, dma_int_clr.dma_seg_trans_done_int_clr,    dma_int_set.dma_seg_trans_done_int_set) \
-    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int_ena,           dma_int_raw.slv_cmd7_int_raw,           dma_int_clr.slv_cmd7_int_clr,              dma_int_set.slv_cmd7_int_set) \
-    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int_ena,           dma_int_raw.slv_cmd8_int_raw,           dma_int_clr.slv_cmd8_int_clr,              dma_int_set.slv_cmd8_int_set) \
-    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
-    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
-
+    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int_ena,             dma_int_raw.trans_done_int_raw,             dma_int_clr.trans_done_int_clr,             dma_int_set.trans_done_int_set) \
+    item(SPI_LL_INTR_IN_FULL,       dma_int_ena.dma_infifo_full_err_int_ena,    dma_int_raw.dma_infifo_full_err_int_raw,    dma_int_clr.dma_infifo_full_err_int_clr,    dma_int_set.dma_infifo_full_err_int_set) \
+    item(SPI_LL_INTR_OUT_EMPTY,     dma_int_ena.dma_outfifo_empty_err_int_ena,  dma_int_raw.dma_outfifo_empty_err_int_raw,  dma_int_clr.dma_outfifo_empty_err_int_clr,  dma_int_set.dma_outfifo_empty_err_int_set) \
+    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int_ena,        dma_int_raw.slv_rd_buf_done_int_raw,        dma_int_clr.slv_rd_buf_done_int_clr,        dma_int_set.slv_rd_buf_done_int_set) \
+    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int_ena,        dma_int_raw.slv_wr_buf_done_int_raw,        dma_int_clr.slv_wr_buf_done_int_clr,        dma_int_set.slv_wr_buf_done_int_set) \
+    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int_ena,        dma_int_raw.slv_rd_dma_done_int_raw,        dma_int_clr.slv_rd_dma_done_int_clr,        dma_int_set.slv_rd_dma_done_int_set) \
+    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int_ena,        dma_int_raw.slv_wr_dma_done_int_raw,        dma_int_clr.slv_wr_dma_done_int_clr,        dma_int_set.slv_wr_dma_done_int_set) \
+    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int_ena,     dma_int_raw.dma_seg_trans_done_int_raw,     dma_int_clr.dma_seg_trans_done_int_clr,     dma_int_set.dma_seg_trans_done_int_set) \
+    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int_ena,               dma_int_raw.slv_cmd7_int_raw,               dma_int_clr.slv_cmd7_int_clr,               dma_int_set.slv_cmd7_int_set) \
+    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int_ena,               dma_int_raw.slv_cmd8_int_raw,               dma_int_clr.slv_cmd8_int_clr,               dma_int_set.slv_cmd8_int_set) \
+    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,               dma_int_raw.slv_cmd9_int_raw,               dma_int_clr.slv_cmd9_int_clr,               dma_int_set.slv_cmd9_int_set) \
+    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,               dma_int_raw.slv_cmda_int_raw,               dma_int_clr.slv_cmda_int_clr,               dma_int_set.slv_cmda_int_set)
 
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
diff --git a/components/soc/esp32h4/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32h4/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32h4/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32h4/include/soc/spi_pins.h
diff --git a/components/soc/esp32h4/spi_periph.c b/components/esp_hal_gpspi/esp32h4/spi_periph.c
similarity index 100%
rename from components/soc/esp32h4/spi_periph.c
rename to components/esp_hal_gpspi/esp32h4/spi_periph.c
diff --git a/components/hal/esp32p4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h
similarity index 96%
rename from components/hal/esp32p4/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h
index af6c45b85ca..2d2fdc78e37 100644
--- a/components/hal/esp32p4/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h
@@ -18,7 +18,7 @@
 #include <string.h>
 #include "hal/config.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -57,6 +57,8 @@ typedef spi_dev_t spi_dma_dev_t;
 // Type definition of all supported interrupts
 typedef enum {
     SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_IN_FULL =       BIT(4),     ///< DMA in_full error happened
+    SPI_LL_INTR_OUT_EMPTY =     BIT(5),     ///< DMA out_empty error happened
     SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
     SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
     SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
@@ -1171,17 +1173,18 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
 //helper macros to generate code for each interrupts
 #define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
 #define INTR_LIST(item)    \
-    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int,         dma_int_raw.trans_done_int,         dma_int_clr.trans_done_int,            dma_int_set.trans_done_int) \
-    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int,    dma_int_raw.slv_rd_buf_done_int,    dma_int_clr.slv_rd_buf_done_int,       dma_int_set.slv_rd_buf_done_int) \
-    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int,    dma_int_raw.slv_wr_buf_done_int,    dma_int_clr.slv_wr_buf_done_int,       dma_int_set.slv_wr_buf_done_int) \
-    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int,    dma_int_raw.slv_rd_dma_done_int,    dma_int_clr.slv_rd_dma_done_int,       dma_int_set.slv_rd_dma_done_int) \
-    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int,    dma_int_raw.slv_wr_dma_done_int,    dma_int_clr.slv_wr_dma_done_int,       dma_int_set.slv_wr_dma_done_int) \
-    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int, dma_int_raw.dma_seg_trans_done_int, dma_int_clr.dma_seg_trans_done_int,    dma_int_set.dma_seg_trans_done_int) \
-    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int,           dma_int_raw.slv_cmd7_int,           dma_int_clr.slv_cmd7_int,              dma_int_set.slv_cmd7_int) \
-    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int,           dma_int_raw.slv_cmd8_int,           dma_int_clr.slv_cmd8_int,              dma_int_set.slv_cmd8_int) \
-    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int,           dma_int_raw.slv_cmd9_int,           dma_int_clr.slv_cmd9_int,              dma_int_set.slv_cmd9_int) \
-    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int,           dma_int_raw.slv_cmda_int,           dma_int_clr.slv_cmda_int,              dma_int_set.slv_cmda_int)
-
+    item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done_int,             dma_int_raw.trans_done_int,             dma_int_clr.trans_done_int,             dma_int_set.trans_done_int) \
+    item(SPI_LL_INTR_IN_FULL,       dma_int_ena.dma_infifo_full_err_int,    dma_int_raw.dma_infifo_full_err_int,    dma_int_clr.dma_infifo_full_err_int,    dma_int_set.dma_infifo_full_err_int) \
+    item(SPI_LL_INTR_OUT_EMPTY,     dma_int_ena.dma_outfifo_empty_err_int,  dma_int_raw.dma_outfifo_empty_err_int,  dma_int_clr.dma_outfifo_empty_err_int,  dma_int_set.dma_outfifo_empty_err_int) \
+    item(SPI_LL_INTR_RDBUF,         dma_int_ena.slv_rd_buf_done_int,        dma_int_raw.slv_rd_buf_done_int,        dma_int_clr.slv_rd_buf_done_int,        dma_int_set.slv_rd_buf_done_int) \
+    item(SPI_LL_INTR_WRBUF,         dma_int_ena.slv_wr_buf_done_int,        dma_int_raw.slv_wr_buf_done_int,        dma_int_clr.slv_wr_buf_done_int,        dma_int_set.slv_wr_buf_done_int) \
+    item(SPI_LL_INTR_RDDMA,         dma_int_ena.slv_rd_dma_done_int,        dma_int_raw.slv_rd_dma_done_int,        dma_int_clr.slv_rd_dma_done_int,        dma_int_set.slv_rd_dma_done_int) \
+    item(SPI_LL_INTR_WRDMA,         dma_int_ena.slv_wr_dma_done_int,        dma_int_raw.slv_wr_dma_done_int,        dma_int_clr.slv_wr_dma_done_int,        dma_int_set.slv_wr_dma_done_int) \
+    item(SPI_LL_INTR_SEG_DONE,      dma_int_ena.dma_seg_trans_done_int,     dma_int_raw.dma_seg_trans_done_int,     dma_int_clr.dma_seg_trans_done_int,     dma_int_set.dma_seg_trans_done_int) \
+    item(SPI_LL_INTR_CMD7,          dma_int_ena.slv_cmd7_int,               dma_int_raw.slv_cmd7_int,               dma_int_clr.slv_cmd7_int,               dma_int_set.slv_cmd7_int) \
+    item(SPI_LL_INTR_CMD8,          dma_int_ena.slv_cmd8_int,               dma_int_raw.slv_cmd8_int,               dma_int_clr.slv_cmd8_int,               dma_int_set.slv_cmd8_int) \
+    item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int,               dma_int_raw.slv_cmd9_int,               dma_int_clr.slv_cmd9_int,               dma_int_set.slv_cmd9_int) \
+    item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int,               dma_int_raw.slv_cmda_int,               dma_int_clr.slv_cmda_int,               dma_int_set.slv_cmda_int)
 
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
diff --git a/components/soc/esp32p4/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32p4/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32p4/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32p4/include/soc/spi_pins.h
diff --git a/components/soc/esp32p4/spi_periph.c b/components/esp_hal_gpspi/esp32p4/spi_periph.c
similarity index 100%
rename from components/soc/esp32p4/spi_periph.c
rename to components/esp_hal_gpspi/esp32p4/spi_periph.c
diff --git a/components/hal/esp32s2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32s2/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h
index 8978f6bb2d4..90a4d2fb383 100644
--- a/components/hal/esp32s2/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h
@@ -20,7 +20,6 @@
 #include "esp_attr.h"
 #include "esp_bit_defs.h"
 #include "esp_compiler.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
 #include "soc/spi_reg.h"
 #include "soc/dport_reg.h"
@@ -1121,7 +1120,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9=1) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda=1)
 
-
 __attribute__((always_inline))
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
@@ -1376,6 +1374,20 @@ static inline uint32_t spi_dma_ll_get_in_suc_eof_desc_addr(spi_dma_dev_t *dma_in
     return dma_in->dma_in_suc_eof_des_addr;
 }
 
+/**
+ * Get the DMA RX alignment requirements
+ *
+ * @param dma_dev Beginning address of the DMA peripheral registers.
+ * @param internal_size The internal memory alignment requirements.
+ * @param external_size The external memory alignment requirements.
+ */
+static inline void spi_dma_ll_get_rx_alignment_require(spi_dma_dev_t *dma_dev, uint32_t *internal_size, uint32_t *external_size)
+{
+    *internal_size = 4;
+    // SPI2 supports external memory, SPI3 does not
+    *external_size = (dma_dev == &GPSPI2) ? 16 << dma_dev->dma_conf.ext_mem_bk_size : UINT32_MAX;
+}
+
 //---------------------------------------------------TX-------------------------------------------------//
 /**
  * Reset TX DMA which transmits the data from RAM to a peripheral.
diff --git a/components/hal/esp32s2/include/hal/spi_types.h b/components/esp_hal_gpspi/esp32s2/include/hal/spi_types.h
similarity index 100%
rename from components/hal/esp32s2/include/hal/spi_types.h
rename to components/esp_hal_gpspi/esp32s2/include/hal/spi_types.h
diff --git a/components/soc/esp32s2/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32s2/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32s2/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32s2/include/soc/spi_pins.h
diff --git a/components/soc/esp32s2/spi_periph.c b/components/esp_hal_gpspi/esp32s2/spi_periph.c
similarity index 99%
rename from components/soc/esp32s2/spi_periph.c
rename to components/esp_hal_gpspi/esp32s2/spi_periph.c
index baf477866b8..61a853123f6 100644
--- a/components/soc/esp32s2/spi_periph.c
+++ b/components/esp_hal_gpspi/esp32s2/spi_periph.c
@@ -5,6 +5,7 @@
  */
 
 #include "soc/spi_periph.h"
+#include "soc/spi_mem_struct.h"
 
 /*
  Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc
@@ -34,7 +35,6 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
         .irq_dma = -1,
         .hw = (spi_dev_t *) &SPIMEM1,
         .func = MSPI_FUNC_NUM,
-
     }, {
         .spiclk_out = FSPICLK_OUT_MUX_IDX,
         .spiclk_in = FSPICLK_IN_IDX,
diff --git a/components/hal/esp32s3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h
similarity index 99%
rename from components/hal/esp32s3/include/hal/spi_ll.h
rename to components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h
index acc71ba64bf..fe247a09972 100644
--- a/components/hal/esp32s3/include/hal/spi_ll.h
+++ b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h
@@ -18,8 +18,8 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -55,6 +55,8 @@ typedef spi_dev_t spi_dma_dev_t;
 // Type definition of all supported interrupts
 typedef enum {
     SPI_LL_INTR_TRANS_DONE =    BIT(0),     ///< A transaction has done
+    SPI_LL_INTR_IN_FULL =       BIT(4),     ///< DMA in_full error happened
+    SPI_LL_INTR_OUT_EMPTY =     BIT(5),     ///< DMA out_empty error happened
     SPI_LL_INTR_RDBUF =         BIT(6),     ///< Has received RDBUF command. Only available in slave HD.
     SPI_LL_INTR_WRBUF =         BIT(7),     ///< Has received WRBUF command. Only available in slave HD.
     SPI_LL_INTR_RDDMA =         BIT(8),     ///< Has received RDDMA command. Only available in slave HD.
@@ -1112,6 +1114,8 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
 #define FOR_EACH_ITEM(op, list) do { list(op) } while(0)
 #define INTR_LIST(item)    \
     item(SPI_LL_INTR_TRANS_DONE,    dma_int_ena.trans_done,         dma_int_raw.trans_done,         dma_int_clr.trans_done,         dma_int_set.trans_done_int_set) \
+    item(SPI_LL_INTR_IN_FULL,       dma_int_ena.infifo_full_err,    dma_int_raw.infifo_full_err,    dma_int_clr.infifo_full_err,    dma_int_set.infifo_full_err_int_set) \
+    item(SPI_LL_INTR_OUT_EMPTY,     dma_int_ena.outfifo_empty_err,  dma_int_raw.outfifo_empty_err,  dma_int_clr.outfifo_empty_err,  dma_int_set.outfifo_empty_err_int_set) \
     item(SPI_LL_INTR_RDBUF,         dma_int_ena.rd_buf_done,        dma_int_raw.rd_buf_done,        dma_int_clr.rd_buf_done,        dma_int_set.rd_buf_done_int_set) \
     item(SPI_LL_INTR_WRBUF,         dma_int_ena.wr_buf_done,        dma_int_raw.wr_buf_done,        dma_int_clr.wr_buf_done,        dma_int_set.wr_buf_done_int_set) \
     item(SPI_LL_INTR_RDDMA,         dma_int_ena.rd_dma_done,        dma_int_raw.rd_dma_done,        dma_int_clr.rd_dma_done,        dma_int_set.rd_dma_done_int_set) \
@@ -1122,7 +1126,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9,               dma_int_set.cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda,               dma_int_set.cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1223,7 +1226,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1264,7 +1266,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
 
 #define SPI_LL_SCT_MAGIC_NUMBER                 (0x2)
 
-
 /**
  * Set conf phase bits len to HW for segment config trans mode.
  *
diff --git a/components/soc/esp32s3/include/soc/spi_pins.h b/components/esp_hal_gpspi/esp32s3/include/soc/spi_pins.h
similarity index 100%
rename from components/soc/esp32s3/include/soc/spi_pins.h
rename to components/esp_hal_gpspi/esp32s3/include/soc/spi_pins.h
diff --git a/components/soc/esp32s3/spi_periph.c b/components/esp_hal_gpspi/esp32s3/spi_periph.c
similarity index 100%
rename from components/soc/esp32s3/spi_periph.c
rename to components/esp_hal_gpspi/esp32s3/spi_periph.c
diff --git a/components/hal/include/hal/spi_hal.h b/components/esp_hal_gpspi/include/hal/spi_hal.h
similarity index 98%
rename from components/hal/include/hal/spi_hal.h
rename to components/esp_hal_gpspi/include/hal/spi_hal.h
index f9bf7a47656..022880d4254 100644
--- a/components/hal/include/hal/spi_hal.h
+++ b/components/esp_hal_gpspi/include/hal/spi_hal.h
@@ -27,6 +27,7 @@
 #pragma once
 #include "esp_err.h"
 #include "soc/soc_caps.h"
+#include "soc/spi_periph.h"
 #include "hal/spi_types.h"
 #if SOC_GPSPI_SUPPORTED
 #include "hal/spi_ll.h"
@@ -230,6 +231,23 @@ void spi_hal_user_start(const spi_hal_context_t *hal);
  */
 bool spi_hal_usr_is_done(const spi_hal_context_t *hal);
 
+/**
+ * Get SPI interrupt bits status by mask
+ *
+ * @param hal Context of the HAL layer.
+ * @param mask Mask of the interrupt bits to check.
+ * @return True if the masked interrupts are set, false otherwise.
+ */
+bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask);
+
+/**
+ * Clear SPI interrupt bits by mask
+ *
+ * @param hal Context of the HAL layer.
+ * @param mask Mask of the interrupt bits to clear.
+ */
+void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask);
+
 /**
  * Setup transaction operations, write tx buffer to HW registers
  *
@@ -332,16 +350,6 @@ void spi_hal_sct_deinit(spi_hal_context_t *hal);
  */
 void spi_hal_sct_set_conf_bits_len(spi_hal_context_t *hal, uint32_t conf_len);
 
-/**
- * Clear SPI interrupt bits by mask
- */
-void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask);
-
-/**
- * Get SPI interrupt bits status by mask
- */
-bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask);
-
 /**
  * Set conf_bitslen base to HW for sct, only supported on s2.
  */
diff --git a/components/hal/include/hal/spi_slave_hal.h b/components/esp_hal_gpspi/include/hal/spi_slave_hal.h
similarity index 100%
rename from components/hal/include/hal/spi_slave_hal.h
rename to components/esp_hal_gpspi/include/hal/spi_slave_hal.h
diff --git a/components/hal/include/hal/spi_slave_hd_hal.h b/components/esp_hal_gpspi/include/hal/spi_slave_hd_hal.h
similarity index 99%
rename from components/hal/include/hal/spi_slave_hd_hal.h
rename to components/esp_hal_gpspi/include/hal/spi_slave_hd_hal.h
index 829272afd30..b718a8be6d5 100644
--- a/components/hal/include/hal/spi_slave_hd_hal.h
+++ b/components/esp_hal_gpspi/include/hal/spi_slave_hd_hal.h
@@ -256,7 +256,6 @@ int spi_slave_hd_hal_get_rxlen(spi_slave_hd_hal_context_t *hal);
  */
 int spi_slave_hd_hal_get_last_addr(spi_slave_hd_hal_context_t *hal);
 
-
 ////////////////////////////////////////////////////////////////////////////////
 // Append Mode
 ////////////////////////////////////////////////////////////////////////////////
diff --git a/components/hal/include/hal/spi_types.h b/components/esp_hal_gpspi/include/hal/spi_types.h
similarity index 100%
rename from components/hal/include/hal/spi_types.h
rename to components/esp_hal_gpspi/include/hal/spi_types.h
diff --git a/components/soc/include/soc/spi_periph.h b/components/esp_hal_gpspi/include/soc/spi_periph.h
similarity index 88%
rename from components/soc/include/soc/spi_periph.h
rename to components/esp_hal_gpspi/include/soc/spi_periph.h
index 8e653edf0c3..a92350a644f 100644
--- a/components/soc/include/soc/spi_periph.h
+++ b/components/esp_hal_gpspi/include/soc/spi_periph.h
@@ -7,36 +7,22 @@
 #pragma once
 
 #include <stdint.h>
-#include "sdkconfig.h"
 #include "soc/soc.h"
 #include "soc/soc_caps.h"
+#include "soc/interrupts.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/spi_reg.h"
+#include "soc/spi_struct.h"
 #include "soc/spi_pins.h"
 #if SOC_PAU_SUPPORTED
 #include "soc/regdma.h"
 #include "soc/retention_periph_defs.h"
 #endif
 
-//include soc related (generated) definitions
-#include "soc/interrupts.h"
-#include "soc/spi_reg.h"
-#include "soc/spi_struct.h"
-#include "soc/gpio_sig_map.h"
-#if SOC_MEMSPI_IS_INDEPENDENT
-#include "soc/spi_mem_struct.h"
-#include "soc/spi_mem_reg.h"
-#endif
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
-#define SPI_FREAD_DIO 0
-#define SPI_FREAD_QIO 0
-#define SPI_FWRITE_DIO 0
-#define SPI_FWRITE_QIO 0
-#endif
-
 /*
  Stores a bunch of per-spi-peripheral data.
 */
diff --git a/components/hal/spi_hal.c b/components/esp_hal_gpspi/spi_hal.c
similarity index 100%
rename from components/hal/spi_hal.c
rename to components/esp_hal_gpspi/spi_hal.c
diff --git a/components/hal/spi_hal_iram.c b/components/esp_hal_gpspi/spi_hal_iram.c
similarity index 97%
rename from components/hal/spi_hal_iram.c
rename to components/esp_hal_gpspi/spi_hal_iram.c
index f77ec2f7528..5ba8b577fc2 100644
--- a/components/hal/spi_hal_iram.c
+++ b/components/esp_hal_gpspi/spi_hal_iram.c
@@ -54,7 +54,7 @@ esp_err_t spi_hal_cal_clock_conf(const spi_hal_timing_param_t *timing_param, spi
 
     if (!(timing_param->half_duplex || dummy == 0 || timing_param->no_compensate)) {
         // This only a short log used as a "key" of the idf hint system, see `hints.yml`
-        HAL_EARLY_LOGE(SPI_HAL_TAG,"The clock_speed_hz should less than %d", freq_limit);
+        HAL_EARLY_LOGE(SPI_HAL_TAG, "The clock_speed_hz should less than %d", freq_limit);
         return ESP_ERR_NOT_SUPPORTED;
     }
 #endif
@@ -234,6 +234,18 @@ bool spi_hal_usr_is_done(const spi_hal_context_t *hal)
     return spi_ll_usr_is_done(hal->hw);
 }
 
+#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
+bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask)
+{
+    return spi_ll_get_intr(hal->hw, mask);
+}
+
+void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask)
+{
+    spi_ll_clear_intr(hal->hw, mask);
+}
+#endif
+
 void spi_hal_push_tx_buffer(const spi_hal_context_t *hal, const spi_hal_trans_config_t *hal_trans)
 {
     if (hal_trans->send_buffer) {
@@ -255,16 +267,9 @@ void spi_hal_fetch_result(const spi_hal_context_t *hal)
 #if SOC_SPI_SCT_SUPPORTED
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
- *----------------------------------------------------------------------------*/
-void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask) {
-    spi_ll_clear_intr(hal->hw, mask);
-}
-
-bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask) {
-    return spi_ll_get_intr(hal->hw, mask);
-}
-
-void spi_hal_sct_set_conf_bits_len(spi_hal_context_t *hal, uint32_t conf_len) {
+*----------------------------------------------------------------------------*/
+void spi_hal_sct_set_conf_bits_len(spi_hal_context_t *hal, uint32_t conf_len)
+{
     spi_ll_set_conf_phase_bits_len(hal->hw, conf_len);
 }
 
diff --git a/components/hal/spi_slave_hal.c b/components/esp_hal_gpspi/spi_slave_hal.c
similarity index 88%
rename from components/hal/spi_slave_hal.c
rename to components/esp_hal_gpspi/spi_slave_hal.c
index d279db86430..c638638ac51 100644
--- a/components/hal/spi_slave_hal.c
+++ b/components/esp_hal_gpspi/spi_slave_hal.c
@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #include "hal/spi_slave_hal.h"
 #include "hal/spi_ll.h"
 #include "soc/soc_caps.h"
diff --git a/components/hal/spi_slave_hal_iram.c b/components/esp_hal_gpspi/spi_slave_hal_iram.c
similarity index 96%
rename from components/hal/spi_slave_hal_iram.c
rename to components/esp_hal_gpspi/spi_slave_hal_iram.c
index b7a6e669bba..1918e53a219 100644
--- a/components/hal/spi_slave_hal_iram.c
+++ b/components/esp_hal_gpspi/spi_slave_hal_iram.c
@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #include "hal/spi_slave_hal.h"
 #include "hal/spi_ll.h"
 #include "soc/soc_caps.h"
diff --git a/components/hal/spi_slave_hd_hal.c b/components/esp_hal_gpspi/spi_slave_hd_hal.c
similarity index 89%
rename from components/hal/spi_slave_hd_hal.c
rename to components/esp_hal_gpspi/spi_slave_hd_hal.c
index 53a432939ad..6da050fedc1 100644
--- a/components/hal/spi_slave_hd_hal.c
+++ b/components/esp_hal_gpspi/spi_slave_hd_hal.c
@@ -10,14 +10,12 @@
 #include "esp_types.h"
 #include "esp_attr.h"
 #include "esp_err.h"
-#include "soc/spi_periph.h"
 #include "soc/lldesc.h"
 #include "soc/soc_caps.h"
 #include "soc/ext_mem_defs.h"   //for SOC_NON_CACHEABLE_OFFSET
 #include "hal/spi_slave_hd_hal.h"
 #include "hal/assert.h"
 
-
 void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_hal_config_t *hal_config)
 {
     spi_dev_t *hw = SPI_LL_GET_HW(hal_config->host_id);
@@ -26,8 +24,8 @@ void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_h
     hal->append_mode = hal_config->append_mode;
     hal->tx_cur_desc = hal->dmadesc_tx;
     hal->rx_cur_desc = hal->dmadesc_rx;
-    hal->tx_dma_head = hal->dmadesc_tx + hal->dma_desc_num -1;
-    hal->rx_dma_head = hal->dmadesc_rx + hal->dma_desc_num -1;
+    hal->tx_dma_head = hal->dmadesc_tx + hal->dma_desc_num - 1;
+    hal->rx_dma_head = hal->dmadesc_rx + hal->dma_desc_num - 1;
 
     spi_ll_slave_hd_init(hw);
     spi_ll_set_addr_bitlen(hw, hal_config->address_bits);
@@ -63,9 +61,9 @@ void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_h
     }
 
     spi_ll_slave_hd_set_len_cond(hw,    SPI_LL_TRANS_LEN_COND_WRBUF |
-                                        SPI_LL_TRANS_LEN_COND_WRDMA |
-                                        SPI_LL_TRANS_LEN_COND_RDBUF |
-                                        SPI_LL_TRANS_LEN_COND_RDDMA);
+                                 SPI_LL_TRANS_LEN_COND_WRDMA |
+                                 SPI_LL_TRANS_LEN_COND_RDBUF |
+                                 SPI_LL_TRANS_LEN_COND_RDDMA);
 
     spi_ll_slave_set_seg_mode(hal->dev, true);
 }
@@ -86,12 +84,14 @@ static int s_desc_get_received_len_addr(spi_dma_desc_t* head, spi_dma_desc_t** o
     if (out_buff_head) {
         *out_buff_head = desc_cpu->buffer;
     }
-    while(head) {
+    while (head) {
         len += desc_cpu->dw0.length;
         bool eof = desc_cpu->dw0.suc_eof;
         desc_cpu = ADDR_DMA_2_CPU(desc_cpu->next);
         head = head->next;
-        if (eof) break;
+        if (eof) {
+            break;
+        }
     }
     if (out_next) {
         *out_next = head;
@@ -130,13 +130,27 @@ void spi_slave_hd_hal_txdma(spi_slave_hd_hal_context_t *hal)
 static spi_ll_intr_t get_event_intr(spi_slave_hd_hal_context_t *hal, spi_event_t ev)
 {
     spi_ll_intr_t intr = 0;
-    if (ev & SPI_EV_SEND)          intr |= SPI_LL_INTR_CMD8;
-    if (ev & SPI_EV_RECV)          intr |= SPI_LL_INTR_CMD7;
-    if (ev & SPI_EV_BUF_TX)        intr |= SPI_LL_INTR_RDBUF;
-    if (ev & SPI_EV_BUF_RX)        intr |= SPI_LL_INTR_WRBUF;
-    if (ev & SPI_EV_CMD9)          intr |= SPI_LL_INTR_CMD9;
-    if (ev & SPI_EV_CMDA)          intr |= SPI_LL_INTR_CMDA;
-    if (ev & SPI_EV_TRANS)         intr |= SPI_LL_INTR_TRANS_DONE;
+    if (ev & SPI_EV_SEND) {
+        intr |= SPI_LL_INTR_CMD8;
+    }
+    if (ev & SPI_EV_RECV) {
+        intr |= SPI_LL_INTR_CMD7;
+    }
+    if (ev & SPI_EV_BUF_TX) {
+        intr |= SPI_LL_INTR_RDBUF;
+    }
+    if (ev & SPI_EV_BUF_RX) {
+        intr |= SPI_LL_INTR_WRBUF;
+    }
+    if (ev & SPI_EV_CMD9) {
+        intr |= SPI_LL_INTR_CMD9;
+    }
+    if (ev & SPI_EV_CMDA) {
+        intr |= SPI_LL_INTR_CMDA;
+    }
+    if (ev & SPI_EV_TRANS) {
+        intr |= SPI_LL_INTR_TRANS_DONE;
+    }
     return intr;
 }
 
diff --git a/components/esp_hal_mspi/CMakeLists.txt b/components/esp_hal_mspi/CMakeLists.txt
index ffdfeb5f283..c8d73fe3781 100644
--- a/components/esp_hal_mspi/CMakeLists.txt
+++ b/components/esp_hal_mspi/CMakeLists.txt
@@ -24,7 +24,9 @@ elseif(NOT BOOTLOADER_BUILD)
 
 endif()
 
-idf_component_register(SRCS ${srcs}
-                    INCLUDE_DIRS ${includes}
-                    REQUIRES soc hal
-                    PRIV_REQUIRES esp_hal_gpio)
+idf_component_register(
+    SRCS ${srcs}
+    INCLUDE_DIRS ${includes}
+    REQUIRES soc hal esp_hal_gpspi
+    PRIV_REQUIRES esp_hal_gpio
+)
diff --git a/components/esp_hal_mspi/esp32/include/hal/spi_flash_ll.h b/components/esp_hal_mspi/esp32/include/hal/spi_flash_ll.h
index 27f6e82ab33..ad8e34b27cb 100644
--- a/components/esp_hal_mspi/esp32/include/hal/spi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32/include/hal/spi_flash_ll.h
@@ -15,9 +15,8 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
-#include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
diff --git a/components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h
index 7b63e6fb925..56dd2431ca7 100644
--- a/components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,8 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
+#include "soc/spi_struct.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include <sys/param.h> // For MIN/MAX
diff --git a/components/esp_hal_mspi/esp32c2/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32c2/include/hal/spimem_flash_ll.h
index 8140fa42058..da92f82c40c 100644
--- a/components/esp_hal_mspi/esp32c2/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c2/include/hal/spimem_flash_ll.h
@@ -19,7 +19,9 @@
 #include <stdbool.h>
 #include <string.h>
 #include "hal/misc.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_struct.h"
+#include "soc/spi_mem_reg.h"
+#include "soc/interrupts.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 
diff --git a/components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h
index 28285336fe5..95fa20b9296 100644
--- a/components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
diff --git a/components/esp_hal_mspi/esp32c3/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32c3/include/hal/spimem_flash_ll.h
index 1fd64092e15..95931b6cd80 100644
--- a/components/esp_hal_mspi/esp32c3/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c3/include/hal/spimem_flash_ll.h
@@ -18,9 +18,9 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
diff --git a/components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h
index 67e588da2ad..503d3417ec8 100644
--- a/components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/assert.h"
diff --git a/components/esp_hal_mspi/esp32c5/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32c5/include/hal/spimem_flash_ll.h
index afbb8ec4728..738160fa51e 100644
--- a/components/esp_hal_mspi/esp32c5/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c5/include/hal/spimem_flash_ll.h
@@ -18,18 +18,17 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
-#include "soc/spi_mem_struct.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
+#include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
-#include "esp_rom_sys.h"
 #include "hal/clk_tree_ll.h"
-#include "soc/clk_tree_defs.h"
+#include "esp_rom_sys.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_mspi/esp32c6/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32c6/include/hal/gpspi_flash_ll.h
index db096c7f184..08209651bc1 100644
--- a/components/esp_hal_mspi/esp32c6/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c6/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32c6/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32c6/include/hal/spimem_flash_ll.h
index 69d24750521..7dcde206b5d 100644
--- a/components/esp_hal_mspi/esp32c6/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c6/include/hal/spimem_flash_ll.h
@@ -18,14 +18,14 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
+#include "soc/pcr_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_mspi/esp32c61/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32c61/include/hal/gpspi_flash_ll.h
index 6a3ce7894d7..3d3fb019c59 100644
--- a/components/esp_hal_mspi/esp32c61/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c61/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32c61/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32c61/include/hal/spimem_flash_ll.h
index 892e08ca968..13929003206 100644
--- a/components/esp_hal_mspi/esp32c61/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32c61/include/hal/spimem_flash_ll.h
@@ -18,17 +18,17 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
+#include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
-#include "esp_rom_sys.h"
 #include "hal/clk_tree_ll.h"
-#include "soc/clk_tree_defs.h"
+#include "esp_rom_sys.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_mspi/esp32h2/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32h2/include/hal/gpspi_flash_ll.h
index 8c101b3ee9f..136b12aebf6 100644
--- a/components/esp_hal_mspi/esp32h2/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h2/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32h2/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32h2/include/hal/spimem_flash_ll.h
index ac41f18087d..d39bdf008c2 100644
--- a/components/esp_hal_mspi/esp32h2/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h2/include/hal/spimem_flash_ll.h
@@ -18,14 +18,14 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
+#include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
-#include "soc/clk_tree_defs.h"
 #include "hal/misc.h"
 
 #ifdef __cplusplus
diff --git a/components/esp_hal_mspi/esp32h21/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32h21/include/hal/gpspi_flash_ll.h
index 49424e110d5..c2705cbd89a 100644
--- a/components/esp_hal_mspi/esp32h21/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h21/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32h21/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32h21/include/hal/spimem_flash_ll.h
index be05c189cd1..15b7d7c01f3 100644
--- a/components/esp_hal_mspi/esp32h21/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h21/include/hal/spimem_flash_ll.h
@@ -18,18 +18,16 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
+#include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
-#include "soc/clk_tree_defs.h"
 #include "hal/misc.h"
 
-//TODO: [ESP32H21] IDF-11609, inherit from h2
-
 #ifdef __cplusplus
 extern "C" {
 #endif
diff --git a/components/esp_hal_mspi/esp32h4/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32h4/include/hal/gpspi_flash_ll.h
index d46fcdeea38..bffcc612d43 100644
--- a/components/esp_hal_mspi/esp32h4/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h4/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32h4/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32h4/include/hal/spimem_flash_ll.h
index e1e7c416fde..7bf08153acd 100644
--- a/components/esp_hal_mspi/esp32h4/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32h4/include/hal/spimem_flash_ll.h
@@ -18,14 +18,14 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/pcr_struct.h"
+#include "soc/interrupts.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/pcr_struct.h"
 #include "esp_rom_sys.h"
 
 #ifdef __cplusplus
diff --git a/components/esp_hal_mspi/esp32p4/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32p4/include/hal/gpspi_flash_ll.h
index 4ada4c24ed8..a4db74e33c8 100644
--- a/components/esp_hal_mspi/esp32p4/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32p4/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/hp_sys_clkrst_struct.h"
 #include "hal/assert.h"
diff --git a/components/esp_hal_mspi/esp32p4/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32p4/include/hal/spimem_flash_ll.h
index eba6f06368f..d887f1ad2e9 100644
--- a/components/esp_hal_mspi/esp32p4/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32p4/include/hal/spimem_flash_ll.h
@@ -18,17 +18,18 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
+#include "soc/spi_mem_struct.h"
 #include "soc/spi1_mem_c_struct.h"
 #include "soc/spi1_mem_c_reg.h"
 #include "soc/hp_sys_clkrst_struct.h"
+#include "soc/interrupts.h"
+#include "soc/chip_revision.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include "hal/misc.h"
 #include "hal/efuse_hal.h"
-#include "soc/chip_revision.h"
 #include "hal/clk_tree_ll.h"
 #include "hal/config.h"
 
diff --git a/components/esp_hal_mspi/esp32s2/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32s2/include/hal/gpspi_flash_ll.h
index b7ccf361487..834faeb0fe6 100644
--- a/components/esp_hal_mspi/esp32s2/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32s2/include/hal/gpspi_flash_ll.h
@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
diff --git a/components/esp_hal_mspi/esp32s2/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32s2/include/hal/spimem_flash_ll.h
index 80ef0ecc1ee..85813ca4c76 100644
--- a/components/esp_hal_mspi/esp32s2/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32s2/include/hal/spimem_flash_ll.h
@@ -18,8 +18,7 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
diff --git a/components/esp_hal_mspi/esp32s3/include/hal/gpspi_flash_ll.h b/components/esp_hal_mspi/esp32s3/include/hal/gpspi_flash_ll.h
index e19b44351a5..71e3cfe1036 100644
--- a/components/esp_hal_mspi/esp32s3/include/hal/gpspi_flash_ll.h
+++ b/components/esp_hal_mspi/esp32s3/include/hal/gpspi_flash_ll.h
@@ -13,8 +13,8 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include <sys/param.h> // For MIN/MAX
diff --git a/components/esp_hal_mspi/esp32s3/include/hal/spimem_flash_ll.h b/components/esp_hal_mspi/esp32s3/include/hal/spimem_flash_ll.h
index 1f7eccfb0be..5158b5ba1e4 100644
--- a/components/esp_hal_mspi/esp32s3/include/hal/spimem_flash_ll.h
+++ b/components/esp_hal_mspi/esp32s3/include/hal/spimem_flash_ll.h
@@ -19,9 +19,10 @@
 #include <stdbool.h>
 #include <string.h>
 
-#include "soc/spi_periph.h"
-#include "hal/assert.h"
+#include "soc/interrupts.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include "hal/misc.h"
diff --git a/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c b/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c
index 4c11f843c1f..306c096c8cd 100644
--- a/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c
+++ b/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c
@@ -6,7 +6,6 @@
 
 // The HAL layer for Touch Sensor (common part)
 
-#include "soc/soc_pins.h"
 #include "hal/touch_sensor_legacy_hal.h"
 #include "hal/touch_sensor_legacy_types.h"
 
diff --git a/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c b/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c
index ed667f0b810..665ddbfcd43 100644
--- a/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c
+++ b/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c
@@ -6,7 +6,6 @@
 
 // The HAL layer for Touch Sensor (common part)
 
-#include "soc/soc_pins.h"
 #include "hal/touch_sensor_legacy_hal.h"
 #include "hal/touch_sensor_ll.h"
 #include "hal/touch_sensor_legacy_types.h"
diff --git a/components/esp_hal_usb/include/soc/usb_periph.h b/components/esp_hal_usb/include/soc/usb_periph.h
index 0002df78b19..edc96c6ac66 100644
--- a/components/esp_hal_usb/include/soc/usb_periph.h
+++ b/components/esp_hal_usb/include/soc/usb_periph.h
@@ -8,7 +8,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/soc_pins.h"
+#include "soc/gpio_pins.h"
 #include "soc/soc_caps.h"
 #include "soc/gpio_sig_map.h"
 
diff --git a/components/esp_mm/esp_cache_msync.c b/components/esp_mm/esp_cache_msync.c
index 68ecd2fb23b..a53a49aec76 100644
--- a/components/esp_mm/esp_cache_msync.c
+++ b/components/esp_mm/esp_cache_msync.c
@@ -102,7 +102,7 @@ esp_err_t esp_cache_msync(void *addr, size_t size, int flags)
     uint32_t cache_id = 0;
     valid = cache_hal_vaddr_to_cache_level_id(vaddr, size, &cache_level, &cache_id);
     if (!valid) {
-        ESP_EARLY_LOGD(TAG, "vaddr is not in cacheable range, do nothing");
+        ESP_EARLY_LOGV(TAG, "vaddr is not in cacheable range, do nothing");
         return ESP_ERR_NOT_SUPPORTED;
     }
 
diff --git a/components/esp_psram/esp32/esp_psram_impl_quad.c b/components/esp_psram/esp32/esp_psram_impl_quad.c
index 6a4f643c175..f5ba2ae2e43 100644
--- a/components/esp_psram/esp32/esp_psram_impl_quad.c
+++ b/components/esp_psram/esp32/esp_psram_impl_quad.c
@@ -23,7 +23,6 @@
 #include "soc/dport_reg.h"
 #include "soc/efuse_periph.h"
 #include "soc/soc_caps.h"
-#include "soc/spi_periph.h"
 #include "soc/chip_revision.h"
 #include "driver/gpio.h"
 #include "hal/efuse_hal.h"
diff --git a/components/esp_psram/esp32s3/esp_psram_impl_octal.c b/components/esp_psram/esp32s3/esp_psram_impl_octal.c
index bf800277224..a5e1aaf999c 100644
--- a/components/esp_psram/esp32s3/esp_psram_impl_octal.c
+++ b/components/esp_psram/esp32s3/esp_psram_impl_octal.c
@@ -18,6 +18,7 @@
 #include "esp32s3/rom/cache.h"
 #include "soc/gpio_periph.h"
 #include "soc/io_mux_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/syscon_reg.h"
 #include "esp_private/spi_flash_os.h"
 #include "esp_private/mspi_timing_tuning.h"
diff --git a/components/esp_rom/patches/esp_rom_spiflash.c b/components/esp_rom/patches/esp_rom_spiflash.c
index f66bc8b5f76..6d4573f9cbe 100644
--- a/components/esp_rom/patches/esp_rom_spiflash.c
+++ b/components/esp_rom/patches/esp_rom_spiflash.c
@@ -5,7 +5,14 @@
  */
 
 #include "sdkconfig.h"
-#include "soc/spi_periph.h"
+#include "soc/soc_caps.h"
+#include "soc/soc.h"
+#include "soc/spi_reg.h"
+#if SOC_MEMSPI_IS_INDEPENDENT
+#include "soc/spi_mem_struct.h"
+#include "soc/spi_mem_reg.h"
+#endif
+
 #include "esp_rom_spiflash.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/spi_flash.h"
diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt
index 0065192d504..9c37889afe7 100644
--- a/components/hal/CMakeLists.txt
+++ b/components/hal/CMakeLists.txt
@@ -160,20 +160,6 @@ elseif(NOT BOOTLOADER_BUILD)
         list(APPEND srcs "ppa_hal.c")
     endif()
 
-    if(CONFIG_SOC_GPSPI_SUPPORTED)
-        # Remember to add esp_hal_gpio to esp_hal_spi PRIV_REQUIRES!!!
-        list(APPEND srcs
-            "spi_hal.c"
-            "spi_hal_iram.c"
-            "spi_slave_hal.c"
-            "spi_slave_hal_iram.c"
-        )
-
-        if(CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2)
-            list(APPEND srcs "spi_slave_hd_hal.c")
-        endif()
-    endif()
-
     if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED)
         list(APPEND srcs "sdio_slave_hal.c")
     endif()
diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt
index 29cdee15060..67d5417015c 100644
--- a/components/soc/CMakeLists.txt
+++ b/components/soc/CMakeLists.txt
@@ -72,10 +72,6 @@ if(CONFIG_SOC_EMAC_SUPPORTED)
     list(APPEND srcs "${target_folder}/emac_periph.c")
 endif()
 
-if(CONFIG_SOC_GPSPI_SUPPORTED)
-    list(APPEND srcs "${target_folder}/spi_periph.c")
-endif()
-
 if(CONFIG_SOC_LEDC_SUPPORTED)
     list(APPEND srcs "${target_folder}/ledc_periph.c")
 endif()
diff --git a/components/soc/esp32/include/soc/soc_pins.h b/components/soc/esp32/include/soc/soc_pins.h
deleted file mode 100644
index 0d0107e6e66..00000000000
--- a/components/soc/esp32/include/soc/soc_pins.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
-#include "soc/sdio_slave_pins.h"
-#include "soc/sdmmc_pins.h"
diff --git a/components/soc/esp32/sdio_slave_periph.c b/components/soc/esp32/sdio_slave_periph.c
index 3fa3e3840ed..d2bcd64a8a4 100644
--- a/components/soc/esp32/sdio_slave_periph.c
+++ b/components/soc/esp32/sdio_slave_periph.c
@@ -6,6 +6,7 @@
 
 #include <stdint.h>
 #include "soc/sdio_slave_periph.h"
+#include "soc/sdio_slave_pins.h"
 
 /**
  * I/O slot of sdio slave:
diff --git a/components/soc/esp32/sdmmc_periph.c b/components/soc/esp32/sdmmc_periph.c
index e7e7403f9f7..1d3a80b1bb4 100644
--- a/components/soc/esp32/sdmmc_periph.c
+++ b/components/soc/esp32/sdmmc_periph.c
@@ -5,6 +5,7 @@
  */
 
 #include "soc/sdmmc_periph.h"
+#include "soc/sdmmc_pins.h"
 
 const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
     {
diff --git a/components/soc/esp32c2/include/soc/soc_pins.h b/components/soc/esp32c2/include/soc/soc_pins.h
deleted file mode 100644
index 05a7c3b4168..00000000000
--- a/components/soc/esp32c2/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32c3/include/soc/soc_pins.h b/components/soc/esp32c3/include/soc/soc_pins.h
deleted file mode 100644
index fccf3031532..00000000000
--- a/components/soc/esp32c3/include/soc/soc_pins.h
+++ /dev/null
@@ -1,24 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32c5/include/soc/soc_pins.h b/components/soc/esp32c5/include/soc/soc_pins.h
deleted file mode 100644
index 9c4974e5421..00000000000
--- a/components/soc/esp32c5/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32c6/include/soc/soc_pins.h b/components/soc/esp32c6/include/soc/soc_pins.h
deleted file mode 100644
index 914f22122d7..00000000000
--- a/components/soc/esp32c6/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32c61/include/soc/soc_pins.h b/components/soc/esp32c61/include/soc/soc_pins.h
deleted file mode 100644
index e9c4b42258b..00000000000
--- a/components/soc/esp32c61/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32h2/include/soc/soc_pins.h b/components/soc/esp32h2/include/soc/soc_pins.h
deleted file mode 100644
index 05a7c3b4168..00000000000
--- a/components/soc/esp32h2/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32h21/include/soc/soc_pins.h b/components/soc/esp32h21/include/soc/soc_pins.h
deleted file mode 100644
index e9c4b42258b..00000000000
--- a/components/soc/esp32h21/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32h4/include/soc/soc_pins.h b/components/soc/esp32h4/include/soc/soc_pins.h
deleted file mode 100644
index fd55809fa8d..00000000000
--- a/components/soc/esp32h4/include/soc/soc_pins.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32p4/include/soc/soc_pins.h b/components/soc/esp32p4/include/soc/soc_pins.h
deleted file mode 100644
index 73842452c1d..00000000000
--- a/components/soc/esp32p4/include/soc/soc_pins.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
-#include "soc/sdmmc_pins.h"
diff --git a/components/soc/esp32p4/sdio_slave_periph.c b/components/soc/esp32p4/sdio_slave_periph.c
index e5f5a19fc5f..e69de29bb2d 100644
--- a/components/soc/esp32p4/sdio_slave_periph.c
+++ b/components/soc/esp32p4/sdio_slave_periph.c
@@ -1,12 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <stdint.h>
-#include "soc/sdio_slave_periph.h"
-#include "soc/sdio_slave_pins.h"
-
-const sdio_slave_slot_info_t sdio_slave_slot_info[1]  = {
-
-};
diff --git a/components/soc/esp32p4/sdmmc_periph.c b/components/soc/esp32p4/sdmmc_periph.c
index 78f3148ab8e..bea43ee2126 100644
--- a/components/soc/esp32p4/sdmmc_periph.c
+++ b/components/soc/esp32p4/sdmmc_periph.c
@@ -5,6 +5,8 @@
  */
 
 #include "soc/sdmmc_periph.h"
+#include "soc/sdmmc_pins.h"
+
 const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
     {
         .width = 8,
diff --git a/components/soc/esp32s2/include/soc/soc_pins.h b/components/soc/esp32s2/include/soc/soc_pins.h
deleted file mode 100644
index 98c20ca52d0..00000000000
--- a/components/soc/esp32s2/include/soc/soc_pins.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "soc/usb_pins.h"
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
diff --git a/components/soc/esp32s3/include/soc/soc_pins.h b/components/soc/esp32s3/include/soc/soc_pins.h
deleted file mode 100644
index 9d0e1784221..00000000000
--- a/components/soc/esp32s3/include/soc/soc_pins.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/*
- * Pin definition header file. The long term plan is to have a single soc_pins.h for all
- * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each
- * peripheral and include them here to avoid developing conflicts in those header files.
- */
-
-#pragma once
-
-#include "soc/usb_pins.h"
-#include "soc/gpio_pins.h"
-#include "soc/spi_pins.h"
-#include "soc/sdmmc_pins.h"
diff --git a/components/soc/esp32s3/sdmmc_periph.c b/components/soc/esp32s3/sdmmc_periph.c
index 3d4f15f1a0f..37471a8c9f7 100644
--- a/components/soc/esp32s3/sdmmc_periph.c
+++ b/components/soc/esp32s3/sdmmc_periph.c
@@ -5,6 +5,7 @@
  */
 
 #include "soc/sdmmc_periph.h"
+#include "soc/sdmmc_pins.h"
 
 const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
     {
diff --git a/components/soc/include/soc/sdio_slave_periph.h b/components/soc/include/soc/sdio_slave_periph.h
index 92126ced5bd..d64006e26cb 100644
--- a/components/soc/include/soc/sdio_slave_periph.h
+++ b/components/soc/include/soc/sdio_slave_periph.h
@@ -8,7 +8,6 @@
 #include <stdint.h>
 //include soc related (generated) definitions
 #include "soc/soc_caps.h"
-#include "soc/soc_pins.h"
 #if SOC_SDIO_SLAVE_SUPPORTED
 #include "soc/sdio_slc_reg.h"
 #include "soc/sdio_slc_struct.h"
diff --git a/components/soc/include/soc/sdmmc_periph.h b/components/soc/include/soc/sdmmc_periph.h
index fe646f5325c..f931a5904d0 100644
--- a/components/soc/include/soc/sdmmc_periph.h
+++ b/components/soc/include/soc/sdmmc_periph.h
@@ -8,7 +8,6 @@
 #include <stdint.h>
 //include soc related (generated) definitions
 #include "soc/soc_caps.h"
-#include "soc/soc_pins.h"
 #include "soc/gpio_num.h"
 #if SOC_SDMMC_HOST_SUPPORTED
 #include "soc/sdmmc_reg.h"
diff --git a/components/soc/linux/include/soc/soc_pins.h b/components/soc/linux/include/soc/soc_pins.h
deleted file mode 100644
index 01d176230bb..00000000000
--- a/components/soc/linux/include/soc/soc_pins.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/**
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
- *
- *  SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c
index bc332f8e11d..4cf2e9cee92 100644
--- a/components/spi_flash/flash_ops.c
+++ b/components/spi_flash/flash_ops.c
@@ -16,6 +16,7 @@
 #include <soc/soc.h>
 #include <soc/soc_memory_layout.h>
 #include "soc/io_mux_reg.h"
+#include "soc/spi_pins.h"
 #include "sdkconfig.h"
 #include "esp_attr.h"
 #include "esp_cpu.h"
diff --git a/components/ulp/CMakeLists.txt b/components/ulp/CMakeLists.txt
index 9a6c0ae019d..41ee4bbd5f9 100644
--- a/components/ulp/CMakeLists.txt
+++ b/components/ulp/CMakeLists.txt
@@ -94,11 +94,8 @@ if(CONFIG_ULP_COPROC_TYPE_LP_CORE)
 
 endif()
 
-idf_component_register(SRCS ${srcs}
-                       INCLUDE_DIRS ${includes}
-                       REQUIRES esp_adc
-                                esp_driver_gpio
-                                esp_driver_uart
-                                esp_driver_i2s
-                                esp_hal_i2c
-                                esp_hal_touch_sens)
+idf_component_register(
+    SRCS ${srcs}
+    INCLUDE_DIRS ${includes}
+    REQUIRES esp_adc esp_driver_gpio esp_driver_uart esp_driver_i2s esp_hal_i2c esp_hal_touch_sens esp_hal_gpspi
+)
diff --git a/docs/doxygen/Doxyfile b/docs/doxygen/Doxyfile
index 12caa87a43c..cffcccabebb 100644
--- a/docs/doxygen/Doxyfile
+++ b/docs/doxygen/Doxyfile
@@ -168,6 +168,7 @@ INPUT = \
     $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/gpio_types.h \
     $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/rtc_io_types.h \
     $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/sdm_types.h \
+    $(PROJECT_PATH)/components/esp_hal_gpspi/include/hal/spi_types.h \
     $(PROJECT_PATH)/components/esp_hal_timg/include/hal/timer_types.h \
     $(PROJECT_PATH)/components/esp_hal_i2c/include/hal/i2c_types.h \
     $(PROJECT_PATH)/components/esp_hal_i2s/include/hal/i2s_types.h \
@@ -266,7 +267,6 @@ INPUT = \
     $(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \
     $(PROJECT_PATH)/components/hal/include/hal/rmt_types.h \
     $(PROJECT_PATH)/components/hal/include/hal/sdio_slave_types.h \
-    $(PROJECT_PATH)/components/hal/include/hal/spi_types.h \
     $(PROJECT_PATH)/components/hal/include/hal/temperature_sensor_types.h \
     $(PROJECT_PATH)/components/hal/include/hal/uart_types.h \
     $(PROJECT_PATH)/components/hal/include/hal/efuse_hal.h \
diff --git a/docs/en/api-reference/peripherals/spi_master.rst b/docs/en/api-reference/peripherals/spi_master.rst
index b0d291a5694..37b45a92645 100644
--- a/docs/en/api-reference/peripherals/spi_master.rst
+++ b/docs/en/api-reference/peripherals/spi_master.rst
@@ -353,6 +353,14 @@ Driver Usage
 
 The example code for the SPI Master driver can be found in the :example:`peripherals/spi_master` directory of ESP-IDF examples.
 
+.. only:: SOC_PSRAM_DMA_CAPABLE
+
+    Transactions with Data on PSRAM
+    ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+    {IDF_TARGET_NAME} supports GPSPI Master with DMA transferring data from/to PSRAM directly without extra internal copy process, which saves memory, by adding :c:macro:`SPI_TRANS_DMA_USE_PSRAM` flag to the transaction.
+
+    Note that this feature shares bandwidth (bus frequency * bus bits width) with MSPI bus, so GPSPI transfer bandwidth should be less than PSRAM bandwidth, **otherwise transmission data may be lost**. You can check the return value or :c:macro:`SPI_TRANS_DMA_RX_FAIL` and :c:macro:`SPI_TRANS_DMA_TX_FAIL` flags after the transaction is finished to check if error occurs during the transmission. If the transaction returns :c:macro:`ESP_ERR_INVALID_STATE` error, the transaction fails.
 
 Transactions with Data Not Exceeding 32 Bits
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -490,7 +498,7 @@ GPIO Matrix and IO_MUX
 
     Most of the chip's peripheral signals have a direct connection to their dedicated IO_MUX pins. However, the signals can also be routed to any other available pins using the less direct GPIO matrix. If at least one signal is routed through the GPIO matrix, then all signals will be routed through it.
 
-    When an SPI Host is set to 80 MHz or lower frequencies, routing SPI pins via the GPIO matrix will behave the same compared to routing them via IOMUX.
+    When an SPI Host is set to 40 MHz or lower frequencies, routing SPI pins via the GPIO matrix will behave the same compared to routing them via IOMUX.
 
     The IO_MUX pins for SPI buses are given below.
 
diff --git a/docs/zh_CN/api-reference/peripherals/spi_master.rst b/docs/zh_CN/api-reference/peripherals/spi_master.rst
index e6856266b41..74c29fc1967 100644
--- a/docs/zh_CN/api-reference/peripherals/spi_master.rst
+++ b/docs/zh_CN/api-reference/peripherals/spi_master.rst
@@ -353,6 +353,14 @@ SPI 总线传输事务由五个阶段构成，详见下表（任意阶段均可
 
 SPI 主机驱动程序的示例代码存放在 ESP-IDF 示例项目的 :example:`peripherals/spi_master` 目录下。
 
+.. only:: SOC_PSRAM_DMA_CAPABLE
+
+    使用 PSRAM 的传输事务
+    ^^^^^^^^^^^^^^^^^^^^^^
+
+    {IDF_TARGET_NAME} 支持 GPSPI Master 通过 DMA 直接传输 PSRAM 存储的数据而不用内部额外的零时拷贝，应此可以节省内存，在传输配置中添加 :c:macro:`SPI_TRANS_DMA_USE_PSRAM` 标志信号即可使用。
+
+    请注意该功能共享 MSPI 总线带宽（总线频率 * 总线位宽），因此 GPSPI 传输带宽应小于 PSRAM 带宽，否则 **可能会丢失传输数据**。可通过在传输结束时检查返回值或 :c:macro:`SPI_TRANS_DMA_RX_FAIL` 和 :c:macro:`SPI_TRANS_DMA_TX_FAIL` 标志信号来判断传输是否发生了错误。若传输事务返回 :c:macro:`ESP_ERR_INVALID_STATE` 错误，则传输事务失败。
 
 传输数据小于 32 位的传输事务
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -490,7 +498,7 @@ GPIO 矩阵与 IO_MUX 管脚
 
     芯片的大多数外围信号都与之专用的 IO_MUX 管脚连接，但这些信号也可以通过较不直接的 GPIO 矩阵路由到任何其他可用的管脚。只要有一个信号是通过 GPIO 矩阵路由的，那么所有的信号都将通过它路由。
 
-    当 SPI 主机被设置为 80 MHz 或更低的频率时，通过 GPIO 矩阵路由 SPI 管脚的行为将与通过 IOMUX 路由相同。
+    当 SPI 主机被设置为 40 MHz 或更低的频率时，通过 GPIO 矩阵路由 SPI 管脚的行为将与通过 IOMUX 路由相同。
 
     SPI 总线的 IO_MUX 管脚如下表所示。
 
diff --git a/examples/peripherals/spi_master/lcd/main/Kconfig.projbuild b/examples/peripherals/spi_master/lcd/main/Kconfig.projbuild
index bab78fc6bf9..6a341da7712 100644
--- a/examples/peripherals/spi_master/lcd/main/Kconfig.projbuild
+++ b/examples/peripherals/spi_master/lcd/main/Kconfig.projbuild
@@ -23,4 +23,13 @@ menu "Example Configuration"
             in practice the driver chips work fine with a higher clock rate, and using that gives a better framerate.
             Select this to try using the out-of-spec clock rate.
 
+    config LCD_BUFFER_IN_PSRAM
+        bool
+        prompt "Malloc LCD buffer from PSRAM, it can save internal RAM"
+        depends on SPIRAM && SOC_PSRAM_DMA_CAPABLE
+        default "y"
+        help
+            Driver is now support using PSRAM memory as LCD buffer directly
+            without additional internal copy, using it is able to save internal
+            memory space, and without CPU cost.
 endmenu
diff --git a/examples/peripherals/spi_master/lcd/main/pretty_effect.c b/examples/peripherals/spi_master/lcd/main/pretty_effect.c
index 9ccd6fd0206..bce1d1c8a3a 100644
--- a/examples/peripherals/spi_master/lcd/main/pretty_effect.c
+++ b/examples/peripherals/spi_master/lcd/main/pretty_effect.c
@@ -19,6 +19,10 @@ uint16_t *pixels;
 //Grab a rgb16 pixel from the esp32_tiles image
 static inline uint16_t get_bgnd_pixel(int x, int y)
 {
+    // Clamp coordinates to valid image bounds
+    x = (x < 0) ? 0 : (x >= IMAGE_W) ? IMAGE_W - 1 : x;
+    y = (y < 0) ? 0 : (y >= IMAGE_H) ? IMAGE_H - 1 : y;
+
     //Get color of the pixel on x,y coords
     return (uint16_t) * (pixels + (y * IMAGE_W) + x);
 }
@@ -26,7 +30,7 @@ static inline uint16_t get_bgnd_pixel(int x, int y)
 //This variable is used to detect the next frame.
 static int prev_frame = -1;
 
-//Instead of calculating the offsets for each pixel we grab, we pre-calculate the valueswhenever a frame changes, then re-use
+//Instead of calculating the offsets for each pixel we grab, we pre-calculate the valueswhenever a frame changes, then reuse
 //these as we go through all the pixels in the frame. This is much, much faster.
 static int8_t xofs[320], yofs[240];
 static int8_t xcomp[320], ycomp[240];
diff --git a/examples/peripherals/spi_master/lcd/main/spi_master_example_main.c b/examples/peripherals/spi_master/lcd/main/spi_master_example_main.c
index 608ba185ae4..a11abcc1037 100644
--- a/examples/peripherals/spi_master/lcd/main/spi_master_example_main.c
+++ b/examples/peripherals/spi_master/lcd/main/spi_master_example_main.c
@@ -343,7 +343,11 @@ static void send_lines(spi_device_handle_t spi, int ypos, uint16_t *linedata)
     trans[4].tx_data[0] = 0x2C;         //memory write
     trans[5].tx_buffer = linedata;      //finally send the line data
     trans[5].length = 320 * 2 * 8 * PARALLEL_LINES;  //Data length, in bits
+#if CONFIG_LCD_BUFFER_IN_PSRAM
+    trans[5].flags = SPI_TRANS_DMA_USE_PSRAM; //using PSRAM
+#else
     trans[5].flags = 0; //undo SPI_TRANS_USE_TXDATA flag
+#endif
 
     //Queue all transactions.
     for (x = 0; x < 6; x++) {
@@ -375,9 +379,17 @@ static void send_line_finish(spi_device_handle_t spi)
 static void display_pretty_colors(spi_device_handle_t spi)
 {
     uint16_t *lines[2];
+#if CONFIG_LCD_BUFFER_IN_PSRAM
+    uint32_t mem_cap = MALLOC_CAP_SPIRAM | MALLOC_CAP_DMA;
+    printf("Get LCD buffer from PSRAM\n");
+#else
+    uint32_t mem_cap = MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA;
+    printf("Get LCD buffer from internal\n");
+#endif
+
     //Allocate memory for the pixel buffers
     for (int i = 0; i < 2; i++) {
-        lines[i] = spi_bus_dma_memory_alloc(LCD_HOST, 320 * PARALLEL_LINES * sizeof(uint16_t), 0);
+        lines[i] = spi_bus_dma_memory_alloc(LCD_HOST, 320 * PARALLEL_LINES * sizeof(uint16_t), mem_cap);
         assert(lines[i] != NULL);
     }
     int frame = 0;
diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt
index 3574843ec5c..c9108712185 100644
--- a/tools/ci/check_copyright_ignore.txt
+++ b/tools/ci/check_copyright_ignore.txt
@@ -461,8 +461,6 @@ components/fatfs/src/ff.h
 components/fatfs/src/ffconf.h
 components/fatfs/src/ffsystem.c
 components/fatfs/src/ffunicode.c
-components/hal/spi_slave_hal.c
-components/hal/spi_slave_hal_iram.c
 components/idf_test/include/idf_performance.h
 components/log/host_test/log_test/main/log_test.cpp
 components/mbedtls/esp_crt_bundle/test_gen_crt_bundle/test_gen_crt_bundle.py
diff --git a/tools/test_apps/system/g1_components/CMakeLists.txt b/tools/test_apps/system/g1_components/CMakeLists.txt
index b66749cf003..521c2b65dc4 100644
--- a/tools/test_apps/system/g1_components/CMakeLists.txt
+++ b/tools/test_apps/system/g1_components/CMakeLists.txt
@@ -19,6 +19,7 @@ set(esp_hal_components
     esp_hal_touch_sens
     esp_hal_usb
     esp_hal_wdt
+    esp_hal_gpspi
 )
 set(COMPONENTS ${g0_components} ${g1_components} ${esp_hal_components} main)