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feat(esp_driver_i2s): support clk tree source management across I2S components

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wuzhenghui
2026-03-05 10:11:56 +08:00
parent 51cca0a88f
commit 2f41c43f3b
15 changed files with 492 additions and 13 deletions
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components/esp_hal_i2s/esp32c6/include/hal/i2s_ll.h
+37 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -287,6 +287,42 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
}
}
/**
* @brief Get TX source clock
*
* @param hw Peripheral I2S hardware instance address.
* @return Current TX clock source (i2s_clock_src_t).
*/
static inline i2s_clock_src_t i2s_ll_tx_clk_get_src(i2s_dev_t *hw)
{
(void)hw;
switch (PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel) {
case 0: return (i2s_clock_src_t)I2S_CLK_SRC_XTAL;
case 1: return (i2s_clock_src_t)I2S_CLK_SRC_PLL_240M;
case 2: return (i2s_clock_src_t)I2S_CLK_SRC_PLL_160M;
case 3: return (i2s_clock_src_t)I2S_CLK_SRC_EXTERNAL;
default: return (i2s_clock_src_t)I2S_CLK_SRC_DEFAULT;
}
}
/**
* @brief Get RX source clock
*
* @param hw Peripheral I2S hardware instance address.
* @return Current RX clock source (i2s_clock_src_t).
*/
static inline i2s_clock_src_t i2s_ll_rx_clk_get_src(i2s_dev_t *hw)
{
(void)hw;
switch (PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel) {
case 0: return (i2s_clock_src_t)I2S_CLK_SRC_XTAL;
case 1: return (i2s_clock_src_t)I2S_CLK_SRC_PLL_240M;
case 2: return (i2s_clock_src_t)I2S_CLK_SRC_PLL_160M;
case 3: return (i2s_clock_src_t)I2S_CLK_SRC_EXTERNAL;
default: return (i2s_clock_src_t)I2S_CLK_SRC_DEFAULT;
}
}
/**
* @brief Set I2S tx bck div num
*