change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER

This commit is contained in:
wuzhenghui
2026-01-31 22:31:34 +08:00
committed by morris
parent 12b9fb6549
commit 2d8c6ed6b4
88 changed files with 1117 additions and 941 deletions
@@ -83,6 +83,10 @@ config SOC_RTC_MEM_SUPPORTED
bool
default y
config SOC_RTC_TIMER_V1_SUPPORTED
bool
default y
config SOC_I2S_SUPPORTED
bool
default y
@@ -86,6 +86,7 @@
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1
#define SOC_RTC_TIMER_V1_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
#define SOC_I2S_I80_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
@@ -275,6 +276,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V1_SUPPORTED
/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
#define SOC_TOUCH_SENSOR_VERSION (1U) /*!<Hardware version of touch sensor */
@@ -99,6 +99,10 @@ config SOC_BOD_SUPPORTED
bool
default y
config SOC_RTC_TIMER_V1_SUPPORTED
bool
default y
config SOC_CLK_TREE_SUPPORTED
bool
default y
@@ -47,6 +47,7 @@
#define SOC_SECURE_BOOT_SUPPORTED 1
#define SOC_SYSTIMER_SUPPORTED 1
#define SOC_BOD_SUPPORTED 1
#define SOC_RTC_TIMER_V1_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
#define SOC_ASSIST_DEBUG_SUPPORTED 1
#define SOC_WDT_SUPPORTED 1
@@ -259,6 +260,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V1_SUPPORTED
/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
#define SOC_MWDT_SUPPORT_XTAL (1)
@@ -87,6 +87,10 @@ config SOC_RTC_MEM_SUPPORTED
bool
default y
config SOC_RTC_TIMER_V1_SUPPORTED
bool
default y
config SOC_I2S_SUPPORTED
bool
default y
@@ -44,6 +44,7 @@
#define SOC_EFUSE_SUPPORTED 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1
#define SOC_RTC_TIMER_V1_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1
#define SOC_SDM_SUPPORTED 1
@@ -336,6 +337,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V1_SUPPORTED
/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
#define SOC_MWDT_SUPPORT_XTAL (1)
@@ -199,7 +199,7 @@ config SOC_PAU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -72,7 +72,7 @@
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
#define SOC_LP_PERIPHERALS_SUPPORTED 1
#define SOC_LP_I2C_SUPPORTED 1
@@ -456,6 +456,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_SUPPORT_ETM (1)
@@ -195,7 +195,7 @@ config SOC_PAU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -71,7 +71,7 @@
#define SOC_PMU_SUPPORTED 1
#define SOC_PMU_PVT_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
#define SOC_LP_PERIPHERALS_SUPPORTED 1
#define SOC_LP_I2C_SUPPORTED 1
@@ -402,6 +402,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_SUPPORT_ETM (1)
@@ -119,7 +119,7 @@ config SOC_PMU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -54,7 +54,7 @@
#define SOC_BOD_SUPPORTED 1
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
#define SOC_ASSIST_DEBUG_SUPPORTED 1
@@ -357,6 +357,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_SUPPORT_SLEEP_RETENTION (1)
@@ -199,7 +199,7 @@ config SOC_PMU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -88,7 +88,7 @@
#define SOC_VBAT_SUPPORTED 1
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
@@ -419,6 +419,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_SUPPORT_ETM (1)
@@ -99,7 +99,7 @@ config SOC_PMU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -61,7 +61,7 @@
// #define SOC_BOD_SUPPORTED 1 //TODO: [ESP32H21] IDF-11530
// #define SOC_APM_SUPPORTED 1 //TODO: [ESP32H21] IDF-11494
#define SOC_PMU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
// #define SOC_LP_PERIPHERALS_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
@@ -401,6 +401,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
// #define SOC_TIMER_SUPPORT_ETM (1) //TODO: [ESP32H21] IDF-11576
@@ -103,7 +103,7 @@ config SOC_PAU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -75,7 +75,7 @@
// #define SOC_APM_SUPPORTED 1 // TODO: [ESP32H4] IDF-12256
#define SOC_PMU_SUPPORTED 1 // TODO: [ESP32H4] IDF-12286
#define SOC_PAU_SUPPORTED 1
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
// #define SOC_LP_PERIPHERALS_SUPPORTED 1
// #define SOC_LP_I2C_SUPPORTED 1 // TODO: [ESP32H4] IDF-12449
@@ -393,6 +393,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
// #define SOC_TIMER_SUPPORT_ETM (1) // TODO: [ESP32H4] IDF-12355
@@ -267,7 +267,7 @@ config SOC_PAU_SUPPORTED
bool
default y
config SOC_LP_TIMER_SUPPORTED
config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
@@ -89,7 +89,7 @@
#define SOC_PVT_RETENTION_BY_REGDMA 1
#define SOC_DCDC_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1 //TODO: IDF-7531
#define SOC_LP_TIMER_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_ULP_LP_UART_SUPPORTED 1
#define SOC_LP_GPIO_MATRIX_SUPPORTED 1
#define SOC_LP_PERIPHERALS_SUPPORTED 1
@@ -570,6 +570,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V2_SUPPORTED
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_SUPPORT_ETM 1
@@ -99,6 +99,10 @@ config SOC_RTC_MEM_SUPPORTED
bool
default y
config SOC_RTC_TIMER_V1_SUPPORTED
bool
default y
config SOC_PSRAM_DMA_CAPABLE
bool
default y
@@ -67,6 +67,7 @@
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1
#define SOC_RTC_TIMER_V1_SUPPORTED 1
#define SOC_PSRAM_DMA_CAPABLE 1
#define SOC_XT_WDT_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
@@ -290,6 +291,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V1_SUPPORTED
/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
#define SOC_TOUCH_SENSOR_VERSION (2) /*!< Hardware version of touch sensor */
@@ -135,6 +135,10 @@ config SOC_RTC_MEM_SUPPORTED
bool
default y
config SOC_RTC_TIMER_V1_SUPPORTED
bool
default y
config SOC_PSRAM_DMA_CAPABLE
bool
default y
@@ -61,6 +61,7 @@
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1
#define SOC_RTC_TIMER_V1_SUPPORTED 1
#define SOC_PSRAM_DMA_CAPABLE 1
#define SOC_XT_WDT_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
@@ -323,6 +324,7 @@
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part
#define SOC_RTC_TIMER_SUPPORTED SOC_RTC_TIMER_V1_SUPPORTED
/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
#define SOC_TOUCH_SENSOR_VERSION (2) /*!< Hardware version of touch sensor */
+1 -1
View File
@@ -38,7 +38,7 @@
#include "soc/lp_i2c_reg.h"
#include "soc/lp_i2c_struct.h"
#endif
#if SOC_LP_TIMER_SUPPORTED
#if SOC_RTC_TIMER_V2_SUPPORTED
#include "soc/lp_timer_reg.h"
#include "soc/lp_timer_struct.h"
#endif