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https://github.com/espressif/esp-idf.git
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change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER
This commit is contained in:
wuzhenghui
morris
@@ -1,88 +0,0 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for ESP32-H4 LP_Timer register operations
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#pragma once
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#include <stdlib.h>
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "soc/lp_timer_struct.h"
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#include "soc/lp_timer_reg.h"
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#include "soc/lp_aon_reg.h"
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#include "hal/misc.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].hi, main_timer_tar_high0, (value >> 32) & 0xFFFF);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].lo, main_timer_tar_low0, value & 0xFFFFFFFF);
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}
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FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
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{
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dev->target[timer_id].hi.main_timer_tar_en0 = en;
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].lo, main_timer_buf0_low);
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].hi, main_timer_buf0_high);
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}
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FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
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{
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dev->update.main_timer_update = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
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{
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dev->int_clr.soc_wakeup_int_clr = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *dev)
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{
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dev->int_clr.overflow_clr = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *dev)
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{
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dev->lp_int_clr.main_timer_lp_int_clr = 1;
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_lp_intr_raw(lp_timer_dev_t *dev)
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{
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return dev->lp_int_raw.val;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uint32_t mask)
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{
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dev->lp_int_clr.val = mask;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
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{
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dev->lp_int_ena.main_timer_lp_int_ena = enable;
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}
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/* Record the start and finish times for one-time regdma work */
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FORCE_INLINE_ATTR void lp_timer_ll_record_regdma_work_time_enable(lp_timer_dev_t *dev, bool en)
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{
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dev->update.main_timer_regdma_work = en;
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}
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#ifdef __cplusplus
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}
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#endif
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133
components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h
Normal file
133
components/esp_hal_rtc_timer/esp32h4/include/hal/rtc_timer_ll.h
Normal file
@@ -0,0 +1,133 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for ESP32-H4 RTC_Timer register operations
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#pragma once
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#include <stdlib.h>
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "soc/lp_timer_struct.h"
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#include "soc/lp_timer_reg.h"
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#include "soc/lp_aon_reg.h"
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#include "hal/misc.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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FORCE_INLINE_ATTR void rtc_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].hi, main_timer_tar_high0, (value >> 32) & 0xFFFF);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].lo, main_timer_tar_low0, value & 0xFFFFFFFF);
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}
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FORCE_INLINE_ATTR void rtc_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
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{
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dev->target[timer_id].hi.main_timer_tar_en0 = en;
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}
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FORCE_INLINE_ATTR uint32_t rtc_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].lo, main_timer_buf0_low);
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}
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FORCE_INLINE_ATTR uint32_t rtc_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].hi, main_timer_buf0_high);
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}
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FORCE_INLINE_ATTR void rtc_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
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{
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dev->update.main_timer_update = 1;
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}
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/**
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* @brief Clear alarm interrupt status
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*
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* @param dev LP timer peripheral instance
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* @param timer_id Timer ID (0 for main timer, 1 for LP timer)
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*/
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FORCE_INLINE_ATTR void rtc_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev, uint8_t timer_id)
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{
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if (timer_id == 0) {
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dev->int_clr.soc_wakeup_int_clr = 1;
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} else if (timer_id == 1) {
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dev->lp_int_clr.main_timer_lp_int_clr = 1;
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}
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}
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/**
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* @brief Get interrupt raw status
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*
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* @param dev LP timer peripheral instance
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* @param timer_id Timer ID (0 for main timer, 1 for LP timer)
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* @return Interrupt raw status value
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*/
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FORCE_INLINE_ATTR uint32_t rtc_timer_ll_get_intr_raw(lp_timer_dev_t *dev, uint8_t timer_id)
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{
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if (timer_id == 0) {
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return dev->int_raw.val;
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} else if (timer_id == 1) {
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return dev->lp_int_raw.val;
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}
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return 0;
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}
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/**
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* @brief Enable/disable alarm interrupt
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*
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* @param dev LP timer peripheral instance
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* @param timer_id Timer ID (0 for main timer, 1 for LP timer)
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* @param enable Enable or disable interrupt
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*/
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FORCE_INLINE_ATTR void rtc_timer_ll_alarm_intr_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool enable)
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{
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if (timer_id == 0) {
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dev->int_ena.soc_wakeup_int_ena = enable;
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} else if (timer_id == 1) {
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dev->lp_int_ena.main_timer_lp_int_ena = enable;
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}
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}
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/* Record the start and finish times for one-time regdma work */
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FORCE_INLINE_ATTR void rtc_timer_ll_record_regdma_work_time_enable(lp_timer_dev_t *dev, bool en)
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{
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dev->update.main_timer_regdma_work = en;
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}
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/**
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* @brief Set wakeup timer value
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*
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* @param timer_id Timer ID
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* @param ticks Timer value in RTC slow clock ticks
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*/
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FORCE_INLINE_ATTR void rtc_timer_ll_set_wakeup_time(uint8_t timer_id, uint64_t ticks)
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{
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rtc_timer_ll_clear_alarm_intr_status(&LP_TIMER, timer_id);
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rtc_timer_ll_set_alarm_target(&LP_TIMER, timer_id, ticks);
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rtc_timer_ll_set_target_enable(&LP_TIMER, timer_id, true);
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}
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/**
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* @brief Get current RTC timer cycle count
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*
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* @param timer_id Timer ID
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* @return Current RTC time in RTC slow clock ticks
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*/
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FORCE_INLINE_ATTR uint64_t rtc_timer_ll_get_cycle_count(uint8_t timer_id)
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{
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rtc_timer_ll_counter_snapshot(&LP_TIMER);
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uint32_t lo = rtc_timer_ll_get_counter_value_low(&LP_TIMER, timer_id);
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uint32_t hi = rtc_timer_ll_get_counter_value_high(&LP_TIMER, timer_id);
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return ((uint64_t)hi << 32) | lo;
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}
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#ifdef __cplusplus
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}
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#endif
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