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clk_tree: Add a general API to get the frequency of different clocks
Add basic clk_tree driver and hal implementation.
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@@ -1011,6 +1011,10 @@ config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
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bool
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default y
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config SOC_CLK_XTAL32K_SUPPORTED
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bool
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default y
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config SOC_EFUSE_DIS_DOWNLOAD_DCACHE
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bool
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default y
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -112,6 +112,7 @@ typedef enum {
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SOC_MOD_CLK_RC_FAST_D256, /*!< RC_FAST_D256_CLK comes from the internal 20MHz rc oscillator, divided by 256, and passing a clock gating to the peripherals */
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SOC_MOD_CLK_XTAL, /*!< XTAL_CLK comes from the external 40MHz crystal */
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SOC_MOD_CLK_TEMP_SENSOR, /*!< TEMP_SENSOR_CLK comes directly from the internal 20MHz rc oscillator */
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SOC_MOD_CLK_INVALID, /*!< Indication of the end of the available module clock sources */
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} soc_module_clk_t;
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//////////////////////////////////////////////////SYSTIMER///////////////////////////////////////////////////////////////
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@@ -417,6 +417,8 @@
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#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
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#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
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#define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */
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/*-------------------------- eFuse CAPS----------------------------*/
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#define SOC_EFUSE_DIS_DOWNLOAD_DCACHE 1
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#define SOC_EFUSE_HARD_DIS_JTAG 1
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