feat(mmu): s31 support

This commit is contained in:
armando
2026-04-01 11:49:22 +08:00
parent 3b428659a0
commit 2b582796d3
23 changed files with 122 additions and 54 deletions
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -97,10 +97,12 @@ extern "C" {
* MMU Linear Address
*----------------------------------------------------------------------------*/
/**
* - 64KB MMU page size: the last 0xFFFF, which is the offset
* - 1024 MMU entries for flash, 1024 MMU entries for psram, needs 0xFFF to hold it.
* - 64KB MMU page size: the lower 0xFFFF bits are the page offset
* - Flash linear addresses start from 0x00000000, PSRAM linear addresses start from 0x08000000
* - The mask keeps the bits needed to distinguish flash and PSRAM linear ranges while discarding
* the upper virtual-address tag bits
*
* Therefore, 0x3F,FFFF
* Therefore, use 0x0FFFFFFF.
*/
#define SOC_MMU_LINEAR_ADDR_MASK 0xFFFFFFF