From 2a9d1ee20e5d0a745b9d0a894bd90b7e590dbfb2 Mon Sep 17 00:00:00 2001 From: morris Date: Fri, 24 Jul 2026 15:55:34 +0800 Subject: [PATCH] refactor(uhci): rename set_eof_mode to enable_eof_modes with bool en param MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename uhci_ll_rx_set_eof_mode → uhci_ll_rx_enable_eof_modes and its parameter eof_mode → eof_modes to reflect that multiple EOF modes can be enabled simultaneously via bitmask. Add bool en parameter so callers can enable or disable without an outer if-check. --- .../transport/driver/uart/hci_driver_uart_dma.c | 4 ++-- .../transport/driver/uart/hci_driver_uart_dma.c | 4 ++-- components/esp_driver_uart/src/uhci.c | 11 +++-------- .../esp_hal_uart/esp32c3/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32c5/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32c6/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32h2/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32h21/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32h4/include/hal/uhci_ll.h | 16 ++++++++-------- .../esp_hal_uart/esp32p4/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32s3/include/hal/uhci_ll.h | 14 +++++++------- .../esp_hal_uart/esp32s31/include/hal/uhci_ll.h | 16 ++++++++-------- 12 files changed, 72 insertions(+), 77 deletions(-) diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c index 275961e9584..a50ddc57d5a 100644 --- a/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c @@ -461,8 +461,8 @@ static void hci_driver_uart_dma_install(void) gdma_register_tx_event_callbacks(s_tx_channel, &tx_cbs, NULL); // configure UHCI uhci_ll_init((uhci_dev_t *)s_uhci_hw); - // uhci_ll_rx_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_LEN_EOF); - uhci_ll_rx_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_IDLE_EOF); + // uhci_ll_rx_enable_eof_modes((uhci_dev_t *)s_uhci_hw, UHCI_RX_LEN_EOF, true); + uhci_ll_rx_enable_eof_modes((uhci_dev_t *)s_uhci_hw, UHCI_RX_IDLE_EOF, true); // disable software flow control s_uhci_hw->escape_conf.val = 0; uhci_ll_attach_uart_port((uhci_dev_t *)s_uhci_hw, s_hci_driver_uart_dma_env.hci_uart_params->hci_uart_port); diff --git a/components/bt/porting_btdm/transport/driver/uart/hci_driver_uart_dma.c b/components/bt/porting_btdm/transport/driver/uart/hci_driver_uart_dma.c index c158ae7a709..ae2e8bef771 100644 --- a/components/bt/porting_btdm/transport/driver/uart/hci_driver_uart_dma.c +++ b/components/bt/porting_btdm/transport/driver/uart/hci_driver_uart_dma.c @@ -485,8 +485,8 @@ static void hci_driver_uart_dma_install(void) // configure UHCI uhci_ll_init((uhci_dev_t *)s_uhci_hw); - // uhci_ll_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_LEN_EOF); - uhci_ll_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_IDLE_EOF); + // uhci_ll_rx_enable_eof_modes((uhci_dev_t *)s_uhci_hw, UHCI_RX_LEN_EOF, true); + uhci_ll_rx_enable_eof_modes((uhci_dev_t *)s_uhci_hw, UHCI_RX_IDLE_EOF, true); // disable software flow control s_uhci_hw->escape_conf.val = 0; uhci_ll_attach_uart_port((uhci_dev_t *)s_uhci_hw, s_hci_driver_uart_dma_env.hci_uart_params->hci_uart_port); diff --git a/components/esp_driver_uart/src/uhci.c b/components/esp_driver_uart/src/uhci.c index 63e7ac4db1b..3ff2957f8e4 100644 --- a/components/esp_driver_uart/src/uhci.c +++ b/components/esp_driver_uart/src/uhci.c @@ -6,7 +6,6 @@ #include #include -#include "esp_intr_alloc.h" #if CONFIG_UHCI_ENABLE_DEBUG_LOG // The local log level must be defined before including esp_log.h // Set the maximum log level for this source file @@ -601,16 +600,12 @@ esp_err_t uhci_new_controller(const uhci_controller_config_t *config, uhci_contr }; uhci_ll_set_seper_chr(uhci_ctrl->hal.dev, &seper_chr); - if (config->rx_eof_flags.idle_eof) { - uhci_ll_rx_set_eof_mode(uhci_ctrl->hal.dev, UHCI_RX_IDLE_EOF); - } + uhci_ll_rx_enable_eof_modes(uhci_ctrl->hal.dev, UHCI_RX_IDLE_EOF, config->rx_eof_flags.idle_eof); + uhci_ll_rx_enable_eof_modes(uhci_ctrl->hal.dev, UHCI_RX_LEN_EOF, config->rx_eof_flags.length_eof); + uhci_ll_rx_enable_eof_modes(uhci_ctrl->hal.dev, UHCI_RX_BREAK_CHR_EOF, config->rx_eof_flags.rx_brk_eof); if (config->rx_eof_flags.length_eof) { - uhci_ll_rx_set_eof_mode(uhci_ctrl->hal.dev, UHCI_RX_LEN_EOF); uhci_ll_rx_set_packet_threshold(uhci_ctrl->hal.dev, config->max_packet_receive); } - if (config->rx_eof_flags.rx_brk_eof) { - uhci_ll_rx_set_eof_mode(uhci_ctrl->hal.dev, UHCI_RX_BREAK_CHR_EOF); - } esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &uhci_ctrl->ext_mem_cache_line_size); esp_cache_get_alignment(MALLOC_CAP_INTERNAL, &uhci_ctrl->int_mem_cache_line_size); diff --git a/components/esp_hal_uart/esp32c3/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32c3/include/hal/uhci_ll.h index 591befc749b..b4f6df32f00 100644 --- a/components/esp_hal_uart/esp32c3/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32c3/include/hal/uhci_ll.h @@ -154,16 +154,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32c5/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32c5/include/hal/uhci_ll.h index dbb5ea75699..53ad8d7244f 100644 --- a/components/esp_hal_uart/esp32c5/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32c5/include/hal/uhci_ll.h @@ -138,16 +138,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32c6/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32c6/include/hal/uhci_ll.h index f2f3fe57bce..10a2e45d712 100644 --- a/components/esp_hal_uart/esp32c6/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32c6/include/hal/uhci_ll.h @@ -140,16 +140,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32h2/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32h2/include/hal/uhci_ll.h index 93bff9eb2b3..7614f70713f 100644 --- a/components/esp_hal_uart/esp32h2/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32h2/include/hal/uhci_ll.h @@ -136,16 +136,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32h21/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32h21/include/hal/uhci_ll.h index 23d68888b92..9d05ed639b2 100644 --- a/components/esp_hal_uart/esp32h21/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32h21/include/hal/uhci_ll.h @@ -136,16 +136,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32h4/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32h4/include/hal/uhci_ll.h index 63196606926..b2b118b6a44 100644 --- a/components/esp_hal_uart/esp32h4/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32h4/include/hal/uhci_ll.h @@ -186,21 +186,21 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) * @brief Set the EOF mode for payload receive * * @param hw Pointer to the UHCI device - * @param eof_mode The EOF mode to set. The following modes are supported: + * @param eof_modes The EOF mode to set. The following modes are supported: * - UHCI_RX_BREAK_CHR_EOF: UHCI will end payload receive process when NULL frame is received by UART. * - UHCI_RX_IDLE_EOF: UHCI will end payload receive process when UART has been in idle state. * - UHCI_RX_LEN_EOF: UHCI will end payload receive process when the receiving byte count has reached the specific value. */ -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32p4/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32p4/include/hal/uhci_ll.h index d296e71b8d6..c94209d0d2a 100644 --- a/components/esp_hal_uart/esp32p4/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32p4/include/hal/uhci_ll.h @@ -102,16 +102,16 @@ static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper } } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32s3/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32s3/include/hal/uhci_ll.h index a200c491610..020164d8e49 100644 --- a/components/esp_hal_uart/esp32s3/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32s3/include/hal/uhci_ll.h @@ -155,16 +155,16 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) return hw->int_st.val; } -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } } diff --git a/components/esp_hal_uart/esp32s31/include/hal/uhci_ll.h b/components/esp_hal_uart/esp32s31/include/hal/uhci_ll.h index f0ed5b60fb3..5b171bebb66 100644 --- a/components/esp_hal_uart/esp32s31/include/hal/uhci_ll.h +++ b/components/esp_hal_uart/esp32s31/include/hal/uhci_ll.h @@ -187,21 +187,21 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) * @brief Set the EOF mode for payload receive * * @param hw Pointer to the UHCI device - * @param eof_mode The EOF mode to set. The following modes are supported: + * @param eof_modes The EOF mode to set. The following modes are supported: * - UHCI_RX_BREAK_CHR_EOF: UHCI will end payload receive process when NULL frame is received by UART. * - UHCI_RX_IDLE_EOF: UHCI will end payload receive process when UART has been in idle state. * - UHCI_RX_LEN_EOF: UHCI will end payload receive process when the receiving byte count has reached the specific value. */ -static inline void uhci_ll_rx_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +static inline void uhci_ll_rx_enable_eof_modes(uhci_dev_t *hw, uint32_t eof_modes, bool en) { - if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { - hw->conf0.uart_rx_brk_eof_en = 1; + if (eof_modes & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = en; } - if (eof_mode & UHCI_RX_IDLE_EOF) { - hw->conf0.uart_idle_eof_en = 1; + if (eof_modes & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = en; } - if (eof_mode & UHCI_RX_LEN_EOF) { - hw->conf0.len_eof_en = 1; + if (eof_modes & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = en; } }