Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-03 03:31:41 +03:00
Code Issues Packages Projects Releases Wiki Activity

esp32s3/memprot: Set permission for Icache region

Browse Source
This commit is contained in:
Sachin Parekh
2022-11-30 13:46:53 +00:00
committed by BOT
parent 0c4d5cfc51
commit 2a01e66b25
4 changed files with 85 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/include/soc/esp32s3/soc_memprot_types.h
+6
View File
@@ -62,6 +62,8 @@ typedef enum {
MEMPROT_PMS_AREA_DRAM0_3 = 0x00000080,
MEMPROT_PMS_AREA_IRAM0_RTCFAST_LO = 0x00000100,
MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI = 0x00000200,
MEMPROT_PMS_AREA_ICACHE_0 = 0x00000400,
MEMPROT_PMS_AREA_ICACHE_1 = 0x00000800,
MEMPROT_PMS_AREA_ALL = 0x7FFFFFFF,
MEMPROT_PMS_AREA_INVALID = 0x80000000
} esp_mprot_pms_area_t;
@@ -195,6 +197,10 @@ static inline const char *esp_mprot_pms_area_to_str(const esp_mprot_pms_area_t a
return "PMS_AREA_IRAM0_RTCFAST_LO";
case MEMPROT_PMS_AREA_IRAM0_RTCFAST_HI:
return "PMS_AREA_IRAM0_RTCFAST_HI";
case MEMPROT_PMS_AREA_ICACHE_0:
return "PMS_AREA_ICACHE_0";
case MEMPROT_PMS_AREA_ICACHE_1:
return "PMS_AREA_ICACHE_1";
case MEMPROT_PMS_AREA_ALL:
return "PMS_AREA_ALL";
default:
components/esp_hw_support/port/esp32s3/esp_memprot.c
+18
View File
@@ -334,6 +334,12 @@ esp_err_t esp_mprot_set_pms_area(const esp_mprot_pms_area_t area_type, const uin
ESP_MEMPROT_ERR_CHECK(err, esp_mprot_cpuid_valid(core))
ESP_MEMPROT_ERR_CHECK(err, esp_mprot_ll_err_to_esp_err(memprot_ll_rtcfast_set_pms_area(core, r, w, x, MEMP_HAL_WORLD_0, MEMP_HAL_AREA_HIGH)))
break;
case MEMPROT_PMS_AREA_ICACHE_0:
memprot_ll_icache_set_pms_area_0(r, w, x);
break;
case MEMPROT_PMS_AREA_ICACHE_1:
memprot_ll_icache_set_pms_area_1(r, w, x);
break;
default:
return ESP_ERR_NOT_SUPPORTED;
}
@@ -385,6 +391,12 @@ esp_err_t esp_mprot_get_pms_area(const esp_mprot_pms_area_t area_type, uint32_t
ESP_MEMPROT_ERR_CHECK(err, esp_mprot_cpuid_valid(core))
ESP_MEMPROT_ERR_CHECK(err, esp_mprot_ll_err_to_esp_err(memprot_ll_rtcfast_get_pms_area(core, &r, &w, &x, MEMP_HAL_WORLD_0, MEMP_HAL_AREA_HIGH)))
break;
case MEMPROT_PMS_AREA_ICACHE_0:
memprot_ll_icache_get_pms_area_0(&r, &w, &x);
break;
case MEMPROT_PMS_AREA_ICACHE_1:
memprot_ll_icache_get_pms_area_1(&r, &w, &x);
break;
default:
return ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID;
}
@@ -955,6 +967,12 @@ esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config)
//set permissions
if (use_iram0) {
ret = ESP_OK;
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_ICACHE_0, MEMPROT_OP_NONE, DEFAULT_CPU_NUM));
#if CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_ICACHE_1, MEMPROT_OP_READ | MEMPROT_OP_EXEC, DEFAULT_CPU_NUM));
#else
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_ICACHE_1, MEMPROT_OP_NONE, DEFAULT_CPU_NUM));
#endif
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_IRAM0_0, MEMPROT_OP_READ | MEMPROT_OP_EXEC, DEFAULT_CPU_NUM))
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_IRAM0_1, MEMPROT_OP_READ | MEMPROT_OP_EXEC, DEFAULT_CPU_NUM))
ESP_MEMPROT_ERR_CHECK(ret, esp_mprot_set_pms_area(MEMPROT_PMS_AREA_IRAM0_2, MEMPROT_OP_READ | MEMPROT_OP_EXEC, DEFAULT_CPU_NUM))