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Merge branch 'fix/handle_shared_intr_v6.0' into 'release/v6.0'

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Fix/handle shared intr (v6.0)

See merge request espressif/esp-idf!43504
This commit is contained in:
morris
2025-11-27 11:43:51 +08:00
parent 2e470da924 443c5b0832
commit 28999c8162
46 changed files with 407 additions and 34 deletions
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components/hal/esp32h2/include/hal/ledc_ll.h
+14 -1
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@@ -35,6 +35,8 @@ extern "C" {
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS
/// Get the mask of the fade end interrupt status register.
#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S)
// Channel tasks: ID, enable register and bit
#define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \
@@ -741,7 +743,6 @@ static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_m
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, low-speed mode only
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
* @param intr_status The fade end interrupt status
*
* @return None
@@ -753,6 +754,18 @@ static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t
*intr_status = (value >> int_en_base) & 0xff;
}
/**
* @brief Get the address of the fade end interrupt status register.
*
* @param hw Beginning address of the peripheral registers
* @return Pointer to the fade end interrupt status register.
*/
static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear fade end interrupt status
*
components/hal/esp32h2/include/hal/spi_ll.h
+1 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
components/hal/esp32h2/include/hal/uart_ll.h
+5
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@@ -335,6 +335,11 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
return hw->int_st.val;
}
FORCE_INLINE_ATTR volatile void* uart_ll_get_intr_status_reg(uart_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear the UART interrupt status based on the given mask.
*