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fix(esp_tee): Protect the AES/SHA clock registers from REE access

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This commit is contained in:
Laukik Hase
2025-02-25 16:49:08 +05:30
parent d7222cc89e
commit 26fa7109f3
9 changed files with 90 additions and 33 deletions
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components/esp_system/port/soc/esp32c6/clk.c
+3
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@@ -291,8 +291,11 @@ __attribute__((weak)) void esp_perip_clk_init(void)
periph_ll_disable_clk_set_rst(PERIPH_ASSIST_DEBUG_MODULE);
#endif
periph_ll_disable_clk_set_rst(PERIPH_RSA_MODULE);
#if !CONFIG_SECURE_ENABLE_TEE
// NOTE: [ESP-TEE] The TEE is responsible for the AES and SHA peripherals
periph_ll_disable_clk_set_rst(PERIPH_AES_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_SHA_MODULE);
#endif
periph_ll_disable_clk_set_rst(PERIPH_ECC_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_HMAC_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_DS_MODULE);