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Merge branch 'feature/add_memprot_support_for_esp32h2' into 'master'
esp32h2: enable memory protection scheme using PMA and PMP Closes IDF-6452 and IDF-6332 See merge request espressif/esp-idf!22699
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@@ -416,9 +416,6 @@
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#define SOC_FLASH_ENCRYPTION_XTS_AES 1
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#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
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/*-------------------------- MEMPROT CAPS ------------------------------------*/
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/*-------------------------- UART CAPS ---------------------------------------*/
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// ESP32-C6 has 2 UARTs
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#define SOC_UART_NUM (2)
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@@ -307,6 +307,14 @@ config SOC_CPU_WATCHPOINT_SIZE
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hex
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default 0x80000000
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config SOC_CPU_HAS_PMA
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bool
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default y
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config SOC_CPU_IDRAM_SPLIT_USING_PMP
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bool
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default y
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config SOC_MMU_PAGE_SIZE_CONFIGURABLE
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bool
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default y
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@@ -983,14 +991,6 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
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bool
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default y
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config SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
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int
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default 16
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config SOC_MEMPROT_MEM_ALIGN_SIZE
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int
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default 512
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config SOC_UART_NUM
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int
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default 2
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@@ -176,6 +176,9 @@
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#define SOC_DIRAM_DRAM_LOW 0x40800000
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#define SOC_DIRAM_DRAM_HIGH 0x40850000
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#define MAP_DRAM_TO_IRAM(addr) (addr)
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#define MAP_IRAM_TO_DRAM(addr) (addr)
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// Region of memory accessible via DMA. See esp_ptr_dma_capable().
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#define SOC_DMA_LOW 0x40800000
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#define SOC_DMA_HIGH 0x40850000
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@@ -134,6 +134,9 @@
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#define SOC_CPU_WATCHPOINTS_NUM 4
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#define SOC_CPU_WATCHPOINT_SIZE 0x80000000 // bytes
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#define SOC_CPU_HAS_PMA 1
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#define SOC_CPU_IDRAM_SPLIT_USING_PMP 1
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/*-------------------------- MMU CAPS ----------------------------------------*/
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#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
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#define SOC_MMU_PERIPH_NUM (1U)
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@@ -231,7 +234,6 @@
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#define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16)
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#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10)
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// TODO: IDF-6332 (Copy from esp32c6, need check)
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/*-------------------------- MPU CAPS ----------------------------------------*/
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#define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED 0
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#define SOC_MPU_MIN_REGION_SIZE 0x20000000U
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@@ -415,11 +417,6 @@
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#define SOC_FLASH_ENCRYPTION_XTS_AES 1
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#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
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// TODO: IDF-6332 (Copy from esp32c6, need check)
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/*-------------------------- MEMPROT CAPS ------------------------------------*/
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#define SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE 16
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#define SOC_MEMPROT_MEM_ALIGN_SIZE 512
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/*-------------------------- UART CAPS ---------------------------------------*/
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// ESP32-H2 has 2 UARTs
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#define SOC_UART_NUM (2)
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