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feat: add i2s & etm sleep retention entry on H4

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laokaiyao
2025-07-22 10:05:12 +08:00
parent 424991faaf
commit 263a056486
31 changed files with 317 additions and 233 deletions
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components/soc/esp32c5/include/soc/soc.h
-1
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@@ -18,7 +18,6 @@
#define REG_UHCI_BASE(i) (DR_REG_UHCI_BASE) // only one UHCI on C5
#define REG_UART_BASE(i) (DR_REG_UART0_BASE + (i) * 0x1000) // UART0 and UART1
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE) // only one I2S on C5
#define REG_TIMG_BASE(i) (DR_REG_TIMERG0_BASE + (i) * 0x1000) // TIMERG0 and TIMERG1
#define REG_SPI_MEM_BASE(i) (DR_REG_SPIMEM0_BASE + (i) * 0x1000) // SPIMEM0 and SPIMEM1
#define REG_I2C_BASE(i) (DR_REG_I2C_BASE) // only one I2C on C5