Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

docs(lcd): update rd pin description for i80_controller example

Browse Source 
Closes https://github.com/espressif/esp-idf/issues/18277
This commit is contained in:
Chen Chen
2026-02-27 16:23:54 +08:00
parent 5c8e8945e3
commit 244017bea3
1 changed files with 9 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
examples/peripherals/lcd/i80_controller/README.md
+9 -1
View File
@@ -37,7 +37,7 @@ The connection between ESP Board and the LCD is as follows:
| | | | | | | |
| DATA[0..7] |<------------>| DATA[0..7] | | DATA[0..7] |<------------>| DATA[0..7] |
| | | | | | | |
| PCLK +------------->| PCLK | | PCLK +------------->| PCLK (WR) |
| | | | | | | |
| CS +------------->| CS | | CS +------------->| CS |
| | | | | | | |
@@ -47,9 +47,15 @@ The connection between ESP Board and the LCD is as follows:
| | | | | | | |
| BK_LIGHT +------------->| BCKL | | BK_LIGHT +------------->| BCKL |
| | | | | | | |
| 3V3 +------------->| RD |
| | | |
+-------------+ +----------------+ +-------------+ +----------------+
``` ```
> [!IMPORTANT]
> The 8080 interface also has an **RD** pin. The RD line must be **held high** when idle. (Connect to 3V3 or use pull-up resistors)
Especially, please pay attention to the binary signal level used to turn the LCD backlight on, some LCD modules need a low level to turn it on, while others require a high level. You can change the backlight level macro `EXAMPLE_LCD_BK_LIGHT_ON_LEVEL` in [i80_controller_example_main.c](main/i80_controller_example_main.c). Especially, please pay attention to the binary signal level used to turn the LCD backlight on, some LCD modules need a low level to turn it on, while others require a high level. You can change the backlight level macro `EXAMPLE_LCD_BK_LIGHT_ON_LEVEL` in [i80_controller_example_main.c](main/i80_controller_example_main.c).
### Build and Flash ### Build and Flash
@@ -98,6 +104,8 @@ This example supports two ways of reading images
## Troubleshooting ## Troubleshooting
* **Garbled or random display, or different image on each boot:** If your LCD has an RD pin with no internal pull-up, it must be held high. You can directly connect RD to the 3V3 or use a pull-up resistor.
* Can't get a stable UI when `EXAMPLE_LCD_I80_COLOR_IN_PSRAM` is enabled. * Can't get a stable UI when `EXAMPLE_LCD_I80_COLOR_IN_PSRAM` is enabled.
This is because of the limited PSRAM bandwidth, compared to the internal SRAM. You can either decrease the PCLK clock `EXAMPLE_LCD_PIXEL_CLOCK_HZ` from the menuconfig or increase the PSRAM working frequency `SPIRAM_SPEED` from the KConfig (e.g. **Component-config** -> **ESP PSRAM** -> **PSRAM config** -> **Set PSRAM clock speed**) or decrease the FPS in LVGL configuration. In addition, enabling `SPIRAM_XIP_FROM_PSRAM` can help increase the PCLK frequency when the Frame Buffer is allocated from the PSRAM. This is because of the limited PSRAM bandwidth, compared to the internal SRAM. You can either decrease the PCLK clock `EXAMPLE_LCD_PIXEL_CLOCK_HZ` from the menuconfig or increase the PSRAM working frequency `SPIRAM_SPEED` from the KConfig (e.g. **Component-config** -> **ESP PSRAM** -> **PSRAM config** -> **Set PSRAM clock speed**) or decrease the FPS in LVGL configuration. In addition, enabling `SPIRAM_XIP_FROM_PSRAM` can help increase the PCLK frequency when the Frame Buffer is allocated from the PSRAM.