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fix(soc): update breakpoint nums on c5 and h4

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This commit is contained in:
Chen Jichang
2025-12-18 11:21:48 +08:00
parent d5ddb10d39
commit 23f1428356
4 changed files with 8 additions and 8 deletions
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components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+2 -2
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@@ -461,11 +461,11 @@ config SOC_BRANCH_PREDICTOR_SUPPORTED
config SOC_CPU_BREAKPOINTS_NUM
int
default 4
default 3
config SOC_CPU_WATCHPOINTS_NUM
int
default 4
default 3
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
hex
components/soc/esp32c5/include/soc/soc_caps.h
+2 -2
View File
@@ -173,8 +173,8 @@
#define SOC_INT_HW_NESTED_SUPPORTED 1 // Support for hardware interrupts nesting
#define SOC_BRANCH_PREDICTOR_SUPPORTED 1
#define SOC_CPU_BREAKPOINTS_NUM 4
#define SOC_CPU_WATCHPOINTS_NUM 4
#define SOC_CPU_BREAKPOINTS_NUM 3
#define SOC_CPU_WATCHPOINTS_NUM 3
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x100 // bytes
#define SOC_CPU_HAS_PMA 1