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Merge branch 'fix/h4-esp-timer-latency_v6.0' into 'release/v6.0'
test(esp_timer): increase H4 callback latency limit (v6.0) See merge request espressif/esp-idf!49696
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@@ -885,11 +885,17 @@ TEST_CASE("Test a latency between a call of callback and real event", "[esp_time
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}
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}
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int diff = callback_time - expected_time;
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int diff = callback_time - expected_time;
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esp_rom_printf(DRAM_STR("%d us\n"), diff);
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esp_rom_printf(DRAM_STR("%d us\n"), diff);
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#ifndef CONFIG_IDF_ENV_FPGA
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#ifndef CONFIG_IDF_ENV_FPGA
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if (i != 0) {
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if (i != 0) {
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#if CONFIG_IDF_TARGET_ESP32H4
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// H4 runs this test at 96 MHz, and multicore task dispatch adds extra latency.
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const int max_latency_us = 60;
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#else
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const int max_latency_us = 50;
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#endif
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// skip the first measurement
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// skip the first measurement
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// if CPU_FREQ = 240MHz. 14 - 16us
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TEST_ASSERT_LESS_OR_EQUAL(max_latency_us, diff);
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TEST_ASSERT_LESS_OR_EQUAL(50, diff);
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}
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}
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#endif // not CONFIG_IDF_ENV_FPGA
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#endif // not CONFIG_IDF_ENV_FPGA
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}
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}
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