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Merge branch 'fix/usb_bbpll_light_sleep_backport_v6.0' into 'release/v6.0'

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fix(usb_phy): Fixed USB PHY clock during low-power modes (backport v6.0)

See merge request espressif/esp-idf!52781
This commit is contained in:
morris
2026-09-17 09:47:04 +08:00
parent 0e5c202a32 d923ce2333
commit 1f8d24ceeb
4 changed files with 39 additions and 14 deletions
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components/esp_hw_support/include/esp_private/rtc_clk.h
+4 -3
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -43,9 +43,10 @@ void rtc_clk_cpu_freq_set_xtal_for_sleep(void);
/**
* @brief Notify that the BBPLL has a new in-use consumer
*
* Currently, this function is only used for tracking whether USB Serial/JTAG is using the 48MHz PHY clock
* Currently, this function is used for tracking whether USB PHY is using the 48MHz PHY clock.
*
* Note: Calling this function only helps to not disable the BBPLL clock in `rtc_clk_cpu_freq_set_config`.
* The first consumer enables BBPLL analog power. Later `rtc_clk_cpu_freq_set_config` will not
* disable BBPLL while any consumer remains.
*/
void rtc_clk_bbpll_add_consumer(void);