From 1ed4ec55ba174d358f0bafadcfa19b158fd60770 Mon Sep 17 00:00:00 2001
From: Alexey Lapshin <alexey.lapshin@espressif.com>
Date: Mon, 8 Jun 2026 17:42:09 +0700
Subject: [PATCH] feat(esp_libc): add riscv zcmp testing on esp32c5

---
 components/esp_libc/test_apps/newlib/pytest_newlib.py  | 1 +
 components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp | 1 +
 2 files changed, 2 insertions(+)
 create mode 100644 components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp

diff --git a/components/esp_libc/test_apps/newlib/pytest_newlib.py b/components/esp_libc/test_apps/newlib/pytest_newlib.py
index 59a6f65fcea..d6fb6a2d18f 100644
--- a/components/esp_libc/test_apps/newlib/pytest_newlib.py
+++ b/components/esp_libc/test_apps/newlib/pytest_newlib.py
@@ -17,6 +17,7 @@ from pytest_embedded_idf.utils import idf_parametrize
         ('release_esp32', 'esp32'),
         ('release_esp32c2', 'esp32c2'),
         ('misaligned_mem', 'esp32c3'),
+        ('zcmp', 'esp32c5'),
     ],
     indirect=['config', 'target'],
 )
diff --git a/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp b/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp
new file mode 100644
index 00000000000..7d659180e76
--- /dev/null
+++ b/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp
@@ -0,0 +1 @@
+CONFIG_COMPILER_ENABLE_RISCV_ZCMP=y