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https://github.com/espressif/esp-idf.git
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bugfix: fix wifi loss packet and missing interrupt issues when switching root clock source
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@@ -338,6 +338,16 @@ void rtc_clk_cpu_freq_set_config(const rtc_cpu_freq_config_t *config);
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*/
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void rtc_clk_cpu_freq_set_config_fast(const rtc_cpu_freq_config_t *config);
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#if SOC_CLK_ROOT_CLK_SWITCH_PROTECT
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/**
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* @brief Enable/disable root clock auto gating bypass for 240M/160M PLL switch
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* @param new_config Target cpu frequency config
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* @param old_config Current cpu frequency config
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* @param enable true to enable, false to disable
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*/
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void rtc_clk_root_clk_switch_protect(const rtc_cpu_freq_config_t *new_config, const rtc_cpu_freq_config_t *old_config, bool enable);
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#endif
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/**
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* @brief Get the currently used CPU frequency configuration
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* @param[out] out_config Output, CPU frequency configuration structure
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@@ -350,6 +350,16 @@ static void rtc_clk_update_pll_state_on_cpu_src_switching_end(soc_cpu_clk_src_t
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}
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}
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#if SOC_CLK_ROOT_CLK_SWITCH_PROTECT
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void rtc_clk_root_clk_switch_protect(const rtc_cpu_freq_config_t *new_config, const rtc_cpu_freq_config_t *old_config, bool enable)
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{
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if ((new_config->source == SOC_CPU_CLK_SRC_PLL_F160M && old_config->source == SOC_CPU_CLK_SRC_PLL_F240M) ||
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(new_config->source == SOC_CPU_CLK_SRC_PLL_F240M && old_config->source == SOC_CPU_CLK_SRC_PLL_F160M)) {
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clk_ll_soc_root_clk_auto_gating_bypass(enable);
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}
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}
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#endif
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void rtc_clk_cpu_freq_set_config(const rtc_cpu_freq_config_t *config)
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{
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soc_cpu_clk_src_t old_cpu_clk_src = clk_ll_cpu_get_src();
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