From 1c94a566cbf35af5d0cf22ca83259ec2742b7987 Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Fri, 15 Aug 2025 09:49:08 +0300 Subject: [PATCH] feat(hal): Adds half-word read/write checks for efuse --- components/efuse/test_apps/CMakeLists.txt | 5 +++++ components/hal/esp32/include/hal/efuse_ll.h | 13 +++++++------ components/hal/esp32c2/include/hal/efuse_ll.h | 19 ++++++++++--------- components/hal/esp32c3/include/hal/efuse_ll.h | 17 +++++++++-------- components/hal/esp32c5/include/hal/efuse_ll.h | 9 +++++---- components/hal/esp32c6/include/hal/efuse_ll.h | 17 +++++++++-------- .../hal/esp32c61/include/hal/efuse_ll.h | 15 ++++++++------- components/hal/esp32h2/include/hal/efuse_ll.h | 15 ++++++++------- .../hal/esp32h21/include/hal/efuse_ll.h | 15 ++++++++------- components/hal/esp32h4/include/hal/efuse_ll.h | 15 ++++++++------- components/hal/esp32p4/include/hal/efuse_ll.h | 9 +++++---- components/hal/esp32s2/include/hal/efuse_ll.h | 9 +++++---- components/hal/esp32s3/include/hal/efuse_ll.h | 17 +++++++++-------- 13 files changed, 96 insertions(+), 79 deletions(-) diff --git a/components/efuse/test_apps/CMakeLists.txt b/components/efuse/test_apps/CMakeLists.txt index f943c2c062d..ae55dfa6cba 100644 --- a/components/efuse/test_apps/CMakeLists.txt +++ b/components/efuse/test_apps/CMakeLists.txt @@ -5,3 +5,8 @@ set(COMPONENTS main) include($ENV{IDF_PATH}/tools/cmake/project.cmake) project(efuse_test) + +message(STATUS "Checking efuse registers are not read-write by half-word") +include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake) +check_register_rw_half_word(SOC_MODULES "efuse" + HAL_MODULES "efuse") diff --git a/components/hal/esp32/include/hal/efuse_ll.h b/components/hal/esp32/include/hal/efuse_ll.h index cc92448b9c1..ae0662827c9 100644 --- a/components/hal/esp32/include/hal/efuse_ll.h +++ b/components/hal/esp32/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" @@ -207,27 +208,27 @@ __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint32_t value) { - EFUSE.dac_conf.dac_clk_div = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, value); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel0(uint32_t value) { - EFUSE.clk.clk_sel0 = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.clk, clk_sel0, value); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel1(uint32_t value) { - EFUSE.clk.clk_sel1 = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.clk, clk_sel1, value); } /******************* eFuse control functions *************************/ diff --git a/components/hal/esp32c2/include/hal/efuse_ll.h b/components/hal/esp32c2/include/hal/efuse_ll.h index 2d1248dd283..8ab1ce4a34a 100644 --- a/components/hal/esp32c2/include/hal/efuse_ll.h +++ b/components/hal/esp32c2/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -168,42 +169,42 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_set_tpgm_inactive(uint8_t value) { - EFUSE.wr_tim_conf0.tpgm_inactive = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf0, tpgm_inactive, value); } /******************* eFuse control functions *************************/ diff --git a/components/hal/esp32c3/include/hal/efuse_ll.h b/components/hal/esp32c3/include/hal/efuse_ll.h index c12f99f1a98..e0893b00d44 100644 --- a/components/hal/esp32c3/include/hal/efuse_ll.h +++ b/components/hal/esp32c3/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -143,37 +144,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } /******************* eFuse control functions *************************/ diff --git a/components/hal/esp32c5/include/hal/efuse_ll.h b/components/hal/esp32c5/include/hal/efuse_ll.h index 7e0ae8f9354..ca0482aad04 100644 --- a/components/hal/esp32c5/include/hal/efuse_ll.h +++ b/components/hal/esp32c5/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_defs.h" #include "soc/efuse_reg.h" #include "soc/efuse_periph.h" @@ -184,22 +185,22 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32c6/include/hal/efuse_ll.h b/components/hal/esp32c6/include/hal/efuse_ll.h index c7d5f4a0bbc..a4ca1495e03 100644 --- a/components/hal/esp32c6/include/hal/efuse_ll.h +++ b/components/hal/esp32c6/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -151,37 +152,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline uint32_t efuse_ll_get_controller_state(void) diff --git a/components/hal/esp32c61/include/hal/efuse_ll.h b/components/hal/esp32c61/include/hal/efuse_ll.h index e1b0a9a641c..838b8e7ee2e 100644 --- a/components/hal/esp32c61/include/hal/efuse_ll.h +++ b/components/hal/esp32c61/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_defs.h" #include "soc/efuse_reg.h" #include "soc/efuse_struct.h" @@ -170,37 +171,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE0.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE0.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE0.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE0.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE0.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE0.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE0.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE0.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32h2/include/hal/efuse_ll.h b/components/hal/esp32h2/include/hal/efuse_ll.h index a12018a8986..8889704e247 100644 --- a/components/hal/esp32h2/include/hal/efuse_ll.h +++ b/components/hal/esp32h2/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -139,37 +140,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32h21/include/hal/efuse_ll.h b/components/hal/esp32h21/include/hal/efuse_ll.h index 99ac523246f..5ec6f6eec0a 100644 --- a/components/hal/esp32h21/include/hal/efuse_ll.h +++ b/components/hal/esp32h21/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -141,37 +142,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32h4/include/hal/efuse_ll.h b/components/hal/esp32h4/include/hal/efuse_ll.h index a3e6c266119..ca6225a91ae 100644 --- a/components/hal/esp32h4/include/hal/efuse_ll.h +++ b/components/hal/esp32h4/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -124,12 +125,12 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline int efuse_ll_get_ocode(void) @@ -139,27 +140,27 @@ __attribute__((always_inline)) static inline int efuse_ll_get_ocode(void) __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - //EFUSE.dac_conf.dac_num = val; + //HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - //EFUSE.dac_conf.dac_clk_div = val; + //HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - //EFUSE.wr_tim_conf1.pwr_on_num = val; + //HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32p4/include/hal/efuse_ll.h b/components/hal/esp32p4/include/hal/efuse_ll.h index fe250fa555d..3d88587d093 100644 --- a/components/hal/esp32p4/include/hal/efuse_ll.h +++ b/components/hal/esp32p4/include/hal/efuse_ll.h @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -138,22 +139,22 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void) diff --git a/components/hal/esp32s2/include/hal/efuse_ll.h b/components/hal/esp32s2/include/hal/efuse_ll.h index b77770d21e2..6f325d4aad6 100644 --- a/components/hal/esp32s2/include/hal/efuse_ll.h +++ b/components/hal/esp32s2/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -140,17 +141,17 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } /******************* eFuse control functions *************************/ diff --git a/components/hal/esp32s3/include/hal/efuse_ll.h b/components/hal/esp32s3/include/hal/efuse_ll.h index f724456d9e2..e49fc512208 100644 --- a/components/hal/esp32s3/include/hal/efuse_ll.h +++ b/components/hal/esp32s3/include/hal/efuse_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,6 +8,7 @@ #include #include +#include "hal/misc.h" #include "soc/efuse_periph.h" #include "hal/assert.h" #include "rom/efuse.h" @@ -143,37 +144,37 @@ __attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void) __attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block) { HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX); - EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.cmd, val, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void) { - EFUSE.conf.op_code = EFUSE_READ_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_READ_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void) { - EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.conf, op_code, EFUSE_WRITE_OP_CODE); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val) { - EFUSE.dac_conf.dac_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val) { - EFUSE.dac_conf.dac_clk_div = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.dac_conf, dac_clk_div, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val) { - EFUSE.wr_tim_conf1.pwr_on_num = val; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf1, pwr_on_num, val); } __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value) { - EFUSE.wr_tim_conf2.pwr_off_num = value; + HAL_FORCE_MODIFY_U32_REG_FIELD(EFUSE.wr_tim_conf2, pwr_off_num, value); } /******************* eFuse control functions *************************/