feat(esp_hw_support): support bbpll pd in modem state

This commit is contained in:
hebinglin
2026-05-21 20:03:45 +08:00
parent 1bfa301ee6
commit 1c279178fa
9 changed files with 26 additions and 17 deletions
@@ -40,7 +40,7 @@ if((CONFIG_SOC_PM_SUPPORT_MODEM_PD OR CONFIG_SOC_PM_SUPPORT_TOP_PD) AND CONFIG_S
list(APPEND srcs "port/${target}/sleep_clock.c")
endif()
if(CONFIG_SOC_PM_SUPPORT_PMU_MODEM_STATE AND CONFIG_BT_CTRL_SLEEP_ENABLE AND CONFIG_SOC_PM_XTALX2_PD_IN_MODEM_STATES)
if(CONFIG_BT_CTRL_SLEEP_ENABLE AND CONFIG_SOC_PM_MODEM_LOCK_CLK_WORKAROUND)
list(APPEND srcs "port/${target}/sleep_power.c")
set_property(TARGET ${COMPONENT_LIB}
APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u sleep_power_system_retention_init")
@@ -6,22 +6,23 @@
#include "esp_private/sleep_power.h"
#include "soc/pmu_reg.h"
#include "modem/modem_lpcon_reg.h"
ESP_LOG_ATTR_TAG(TAG, "sleep_power");
#if CONFIG_BT_CTRL_SLEEP_ENABLE
#if CONFIG_BT_CTRL_SLEEP_ENABLE && SOC_PM_MODEM_LOCK_CLK_WORKAROUND
esp_err_t sleep_power_system_retention_init(void *arg)
{
const static sleep_retention_entries_config_t power_regs_retention[] = {
/* During the modem-to-active transition, the MODEM lock keeps the xtalx2 xpd status unchanged.
* Therefore, if xtalx2 is disabled in modem state, we need to set xtalx2 tie-high to enable it in active state. */
[0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_POWER_LINK(0), PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_XTALX2 | PMU_TIE_HIGH_GLOBAL_XTALX2_ICG, PMU_TIE_HIGH_XTALX2_M | PMU_TIE_HIGH_GLOBAL_XTALX2_ICG_M, 1, 0), .owner = ENTRY(2) },
/* During the modem-to-active transition, the MODEM lock keeps the xtalx2, bbpll xpd status unchanged.
* Therefore, if xtalx2, bbpll is disabled in modem state, we need to set xtalx2, bbpll tie-high to enable it in active state. */
[0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(0), PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_XTALX2 | PMU_TIE_HIGH_GLOBAL_XTALX2_ICG, PMU_TIE_HIGH_XTALX2_M | PMU_TIE_HIGH_GLOBAL_XTALX2_ICG_M, 1, 0), .owner = ENTRY(2) },
[1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(1), PMU_IMM_HP_CK_POWER_REG, PMU_TIE_HIGH_XPD_BBPLL | PMU_TIE_HIGH_XPD_BBPLL_I2C, PMU_TIE_HIGH_XPD_BBPLL_M | PMU_TIE_HIGH_XPD_BBPLL_I2C_M, 1, 0), .owner = ENTRY(2) },
};
esp_err_t err = sleep_retention_entries_create(power_regs_retention, ARRAY_SIZE(power_regs_retention), REGDMA_LINK_PRI_POWER, SLEEP_RETENTION_MODULE_POWER);
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for system power retention");
ESP_LOGI(TAG, "System power sleep retention initialization");
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for clock power retention");
ESP_LOGI(TAG, "Clock power sleep retention initialization");
return ESP_OK;
}
@@ -29,7 +30,7 @@ ESP_SYSTEM_INIT_FN(sleep_power_startup_init, SECONDARY, BIT(0), 108)
{
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_power_system_retention_init, .arg = NULL } },
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_POWER, &init_param);