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docs: update PSRAM and flash encryption docs with per-page and separate key capabilities

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This commit is contained in:
Mahavir Jain
2026-03-24 12:54:59 +05:30
parent 5b04915f83
commit 1b9b001f23
14 changed files with 94 additions and 5 deletions
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components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+12
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@@ -1487,10 +1487,22 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_PSRAM_ENCRYPTION_SEPARATE_KEY
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_RECOVERY_BOOTLOADER_SUPPORTED
bool
default y
components/soc/esp32c5/include/soc/soc_caps.h
+5 -2
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -564,9 +564,12 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_XTS_AES_128 (1)
#define SOC_PSRAM_ENCRYPTION_XTS_AES_128 1
#define SOC_PSRAM_ENCRYPTION_SEPARATE_KEY 1 /* PSRAM encryption can use independent key */
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*------------------------Bootloader CAPS---------------------------------*/
/* Support Recovery Bootloader */
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+4
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@@ -1279,6 +1279,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_APM_CTRL_FILTER_SUPPORTED
bool
default y
components/soc/esp32c6/include/soc/soc_caps.h
+1
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@@ -491,6 +491,7 @@
#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (64)
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+8
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@@ -1019,6 +1019,14 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_RECOVERY_BOOTLOADER_SUPPORTED
bool
default y
components/soc/esp32c61/include/soc/soc_caps.h
+4
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@@ -403,6 +403,10 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*------------------------Bootloader CAPS---------------------------------*/
/* Support Recovery Bootloader */
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+4
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@@ -1299,6 +1299,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_APM_CTRL_FILTER_SUPPORTED
bool
default y
components/soc/esp32h2/include/soc/soc_caps.h
+1
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@@ -512,6 +512,7 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1 /*!< Only avliable in chip version above 1.2*/
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+12
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@@ -1963,6 +1963,18 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_SEPARATE_KEY
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_UART_NUM
int
default 6
components/soc/esp32p4/include/soc/soc_caps.h
+7 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -712,6 +712,12 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 /* SOC_EFUSE_XTS_AES_KEY_128 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_128 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 /* SOC_EFUSE_XTS_AES_KEY_256 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_256 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1 /*!< Only available in chip version above 3.0 */
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_SEPARATE_KEY 1 /* PSRAM encryption can use independent key */
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*-------------------------- MEMPROT CAPS ------------------------------------*/
/*-------------------------- UART CAPS ---------------------------------------*/