feat(uhci): add reset and clock control functions

components/soc/esp32s3/include/soc/uhci_struct.h

@@ -1,16 +1,8 @@
-// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_UHCI_STRUCT_H_
 #define _SOC_UHCI_STRUCT_H_
 
@@ -233,7 +225,6 @@ typedef volatile struct uhci_dev_s {
     uint32_t date;
 } uhci_dev_t;
 extern uhci_dev_t UHCI0;
-extern uhci_dev_t UHCI1;
 #ifdef __cplusplus
 }
 #endif

components/soc/esp32s3/ld/esp32s3.peripherals.ld

@@ -19,7 +19,6 @@ PROVIDE ( I2S1 = 0x6002D000 );
 PROVIDE ( UART1 = 0x60010000 );
 PROVIDE ( I2C0 = 0x60013000 );
 PROVIDE ( UHCI0 = 0x60014000 );
-PROVIDE ( UHCI1 = 0x60014000 );
 PROVIDE ( HOST = 0x60015000 );
 PROVIDE ( RMT = 0x60016000 );
 PROVIDE ( RMTMEM = 0x60016800 );